Subversion Repositories cryptopan_core

#-- Synplicity, Inc.
#-- Version Synplify Pro 8.6.2
#-- Project file /home/amb33/cryptopan/cryptopan.prj
#-- Written on Thu Feb 15 11:59:26 2007


#add_file options
add_file -vhdl -lib work "rtl/dual_bram_256x8.vhd"
add_file -vhdl -lib work "rtl/cryptopan_package.vhd"
add_file -vhdl -lib work "rtl/sbox.vhd"
add_file -vhdl -lib work "rtl/subbytesshiftrows.vhd"
add_file -vhdl -lib work "rtl/mixcolumns.vhd"
add_file -vhdl -lib work "rtl/round_unit.vhd"
add_file -vhdl -lib work "rtl/aes_encrypt_unit.vhd"
add_file -vhdl -lib work "rtl/cryptopan_unit.vhd"


#implementation: "rev_1"
impl -add rev_1 -type fpga

#device options
set_option -technology VIRTEX4
set_option -part XC4VFX60
set_option -package FF1152
set_option -speed_grade -11

#compilation/mapping options
set_option -default_enum_encoding default
set_option -symbolic_fsm_compiler 1
set_option -resource_sharing 1
set_option -use_fsm_explorer 0

#map options
set_option -frequency 250.000
set_option -run_prop_extract 1
set_option -fanout_limit 10000
set_option -disable_io_insertion 0
set_option -pipe 1
set_option -update_models_cp 0
set_option -verification_mode 0
set_option -modular 0
set_option -retiming 0
set_option -no_sequential_opt 0
set_option -fixgatedclocks 0

#simulation options
set_option -write_verilog 0
set_option -write_vhdl 0

#VIF options
set_option -write_vif 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "rev_1/cryptopan_unit.edf"

#
#implementation attributes

set_option -vlog_std v2001
set_option -project_relative_includes 1

#par_1 attributes
set_option -job par_1 -add par
set_option -job par_1 -option run_backannotation 0
impl -active "rev_1"