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[/] [darkriscv/] [trunk/] [boards/] [xilinx_ac701_a200/] [darksocv.ucf] - Rev 2

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# Copyright (c) 2018, Marcelo Samsoniuk
# All rights reserved.
# 
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 
# * Redistributions of source code must retain the above copyright notice, this
#   list of conditions and the following disclaimer.
# 
# * Redistributions in binary form must reproduce the above copyright notice,
#   this list of conditions and the following disclaimer in the documentation
#   and/or other materials provided with the distribution.
# 
# * Neither the name of the copyright holder nor the names of its
#   contributors may be used to endorse or promote products derived from
#   this software without specific prior written permission.
# 
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 

NET XCLK            LOC = P16 | IOSTANDARD = LVCMOS33 | PERIOD = 90MHz HIGH 50%;
NET XCLK            CLOCK_DEDICATED_ROUTE = FALSE;

#NET XCLKP           LOC = M21 | IOSTANDARD = LVDS_25 | DIFF_TERM = TRUE | PERIOD = 156.25MHz HIGH 50%;
#NET XCLKN           LOC = M22 | IOSTANDARD = LVDS_25 | DIFF_TERM = TRUE | PERIOD = 156.25MHz HIGH 50%;

NET XRES            LOC = U4  | IOSTANDARD = SSTL15 | PULLDOWN;

NET UART_RXD        LOC = T19 | IOSTANDARD = LVCMOS18;
NET UART_TXD        LOC = U19 | IOSTANDARD = LVCMOS18;

NET LED[3]          LOC = R26 | IOSTANDARD = LVCMOS33;
NET LED[2]          LOC = T25 | IOSTANDARD = LVCMOS33;
NET LED[1]          LOC = T24 | IOSTANDARD = LVCMOS33;
NET LED[0]          LOC = M26 | IOSTANDARD = LVCMOS33;

NET DEBUG[3]        LOC = T23 | IOSTANDARD = LVCMOS33; # J48-1
NET DEBUG[2]        LOC = R22 | IOSTANDARD = LVCMOS33; # J48-2
NET DEBUG[1]        LOC = T22 | IOSTANDARD = LVCMOS33; # J48-3
NET DEBUG[0]        LOC = P26 | IOSTANDARD = LVCMOS33; # J48-4

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