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-- $ XILINX$RCSfile: xc2c64a.bsd,v $
-- XILINX Revision: 1.8
--
-- BSDL file for device %xc2c64a%, package %VQ100%
-- Xilinx, Inc. ADVANCED: Exp $ $Date: 2008-01-16 19:01:36 $
-- Generated by createBSDL_BR %1a.0%
--
-- Unzip these BSDL files into your %xilinx%/xbr/data directory,
-- overwriting all files."
-- =================================================
-- North American Support
-- (Mon,Tues,Wed,Fri 6:30am-5pm
-- Thr 6:30am - 4:00pm Pacific Standard Time)
-- Hotline: 1-800-255-7778
-- or (408) 879-5199
-- Fax: (408) 879-4442
-- Email: hotline@xilinx.com
-- United Kingdom Support
-- (Mon-Fri 08:00 to 17:30 GMT)
-- Hotline: +44 870 7350 610
-- Fax: +44 870 7350 620
-- Email : eurosupport@xilinx.com
--
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--
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-- Hotline: +49 180 3 60 60 60
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--
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-- Wed 9:00am -4:00pm)
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-- =================================================
--
entity xc2c64a is
generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
port ( tdi : in bit;
tck : in bit;
tms : in bit;
tdo : out bit;
IO_0 : inout bit;
IO_1 : inout bit;
IO_2 : inout bit;
IO_3 : inout bit;
IO_4 : inout bit;
IO_5 : inout bit;
IO_6 : inout bit;
IO_7 : inout bit;
IO_8 : inout bit;
IO_9 : inout bit;
IO_10 : inout bit;
IO_11 : inout bit;
IO_12 : inout bit;
IO_13 : inout bit;
IO_14 : inout bit;
IO_15 : inout bit;
IO_16 : inout bit;
IO_17 : inout bit;
IO_18 : inout bit;
IO_19 : inout bit;
IO_20 : inout bit;
IO_21 : inout bit;
IO_22 : inout bit;
IO_23 : inout bit;
IO_24 : inout bit;
IO_25 : inout bit;
IO_26 : inout bit;
IO_27 : inout bit;
IO_28 : inout bit;
IO_29 : inout bit;
IO_30 : inout bit;
IO_31 : inout bit;
IO_32 : inout bit;
IO_33 : inout bit;
IO_34 : inout bit;
IO_35 : inout bit;
IO_36 : inout bit;
IO_37 : inout bit;
IO_38 : inout bit;
IO_39 : inout bit;
IO_40 : inout bit;
IO_41 : inout bit;
IO_42 : inout bit;
IO_43 : inout bit;
IO_44 : inout bit;
IO_45 : inout bit;
IO_46 : inout bit;
IO_47 : inout bit;
IO_48 : inout bit;
IO_49 : inout bit;
IO_50 : inout bit;
IO_51 : inout bit;
IO_52 : inout bit;
IO_53 : inout bit;
IO_54 : inout bit;
IO_55 : inout bit;
IO_56 : inout bit;
IO_57 : inout bit;
IO_58 : inout bit;
IO_59 : inout bit;
IO_60 : inout bit;
IO_61 : inout bit;
IO_62 : inout bit;
IO_63 : inout bit);
use std_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of xc2c64a : entity is "std_1149_1_1993";
attribute PIN_MAP of xc2c64a : entity is PHYSICAL_PIN_MAP;
constant UNDEFINED : PIN_MAP_STRING :=
" tdi:45 , tck:48 , tms:47, tdo:83," &
" IO_0:13, IO_1:12, IO_2:11, IO_3:10, IO_4:9, " &
" IO_5:8, IO_6:7, IO_7:6, IO_8:4, IO_9:3, " &
" IO_10:2, IO_11:1, IO_12:99, IO_13:97, IO_14:94, " &
" IO_15:92, IO_16:14, IO_17:15, IO_18:16, IO_19:17, " &
" IO_20:18, IO_21:19, IO_22:22, IO_23:23, IO_24:24, " &
" IO_25:27, IO_26:28, IO_27:29, IO_28:30, IO_29:32, " &
" IO_30:33, IO_31:34, IO_32:91, IO_33:90, IO_34:89, " &
" IO_35:81, IO_36:79, IO_37:78, IO_38:77, IO_39:76, " &
" IO_40:74, IO_41:72, IO_42:71, IO_43:70, IO_44:68, " &
" IO_45:67, IO_46:64, IO_47:61, IO_48:35, IO_49:36, " &
" IO_50:37, IO_51:39, IO_52:40, IO_53:41, IO_54:42, " &
" IO_55:43, IO_56:49, IO_57:50, IO_58:52, IO_59:53, " &
" IO_60:55, IO_61:56, IO_62:58, IO_63:60";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_CLOCK of tck : signal is (33.0e6, both);
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute INSTRUCTION_LENGTH of xc2c64a : entity is 8;
attribute INSTRUCTION_OPCODE of xc2c64a : entity is
"INTEST (00000010)," &
"BYPASS (11111111)," &
"SAMPLE (00000011)," &
"EXTEST (00000000)," &
"IDCODE (00000001)," &
"USERCODE (11111101)," &
"HIGHZ (11111100)," &
"ISC_ENABLE_CLAMP (11101001)," &
"ISC_ENABLEOTF (11100100)," &
"ISC_ENABLE (11101000)," &
"ISC_SRAM_READ (11100111)," &
"ISC_SRAM_WRITE (11100110)," &
"ISC_ERASE (11101101)," &
"ISC_PROGRAM (11101010)," &
"ISC_READ (11101110)," &
"ISC_INIT (11110000)," &
"ISC_DISABLE (11000000)," &
"TEST_ENABLE (00010001)," &
"BULKPROG (00010010)," &
"ERASE_ALL (00010100)," &
"MVERIFY (00010011)," &
"TEST_DISABLE (00010101)," &
-- "STCTEST (00010110)," &
"ISC_NOOP (11100000)";
attribute INSTRUCTION_CAPTURE of xc2c64a : entity is "XXXXXX01" ;
attribute IDCODE_REGISTER of xc2c64a : entity is "XXXX0110111001011XXX000010010011";
attribute REGISTER_ACCESS of xc2c64a : entity is
"BYPASS (BYPASS)," &
"BYPASS (HIGHZ)," &
"BOUNDARY (SAMPLE)," &
"BOUNDARY (EXTEST)," &
"BOUNDARY (INTEST)," &
"DATAREG[281] (ISC_ENABLEOTF)," &
"DATAREG[281] (ISC_ENABLE)," &
"DATAREG[281] (ISC_SRAM_READ)," &
"DATAREG[281] (ISC_SRAM_WRITE)," &
"DATAREG[281] (ISC_ERASE)," &
"DATAREG[281] (ISC_PROGRAM)," &
"DATAREG[281] (ISC_READ)," &
"DATAREG[281] (ISC_INIT)," &
"DATAREG[281] (ISC_DISABLE)," &
"DATAREG[281] (TEST_ENABLE)," &
"DATAREG[281] (BULKPROG)," &
"DATAREG[281] (ERASE_ALL)," &
"DATAREG[281] (MVERIFY)," &
"DATAREG[281] (TEST_DISABLE)," &
-- "STC[] (STCTEST)," &
"ISC_DEFAULT[1] (ISC_NOOP)," &
"DEVICE_ID (IDCODE, USERCODE)," &
"ISC_DEFAULT[1] (ISC_ENABLE_CLAMP)";
attribute BOUNDARY_LENGTH of xc2c64a : entity is 192;
attribute BOUNDARY_REGISTER of xc2c64a : entity is
--
-- num cell port function safe [ccell disval rslt]
--
" 191 (BC_1, IO_0, INPUT, X)," &
" 190 (BC_1, IO_0, OUTPUT3, X, 189, 0,Z),"&
" 189 (BC_1, *, CONTROL, X)," &
" 188 (BC_1, IO_1, INPUT, X)," &
" 187 (BC_1, IO_1, OUTPUT3, X, 186, 0,Z),"&
" 186 (BC_1, *, CONTROL, X)," &
" 185 (BC_1, IO_2, INPUT, X)," &
" 184 (BC_1, IO_2, OUTPUT3, X, 183, 0,Z),"&
" 183 (BC_1, *, CONTROL, X)," &
" 182 (BC_1, IO_3, INPUT, X)," &
" 181 (BC_1, IO_3, OUTPUT3, X, 180, 0,Z),"&
" 180 (BC_1, *, CONTROL, X)," &
" 179 (BC_1, IO_4, INPUT, X)," &
" 178 (BC_1, IO_4, OUTPUT3, X, 177, 0,Z),"&
" 177 (BC_1, *, CONTROL, X)," &
" 176 (BC_1, IO_5, INPUT, X)," &
" 175 (BC_1, IO_5, OUTPUT3, X, 174, 0,Z),"&
" 174 (BC_1, *, CONTROL, X)," &
" 173 (BC_1, IO_6, INPUT, X)," &
" 172 (BC_1, IO_6, OUTPUT3, X, 171, 0,Z),"&
" 171 (BC_1, *, CONTROL, X)," &
" 170 (BC_1, IO_7, INPUT, X)," &
" 169 (BC_1, IO_7, OUTPUT3, X, 168, 0,Z),"&
" 168 (BC_1, *, CONTROL, X)," &
" 167 (BC_1, IO_8, INPUT, X)," &
" 166 (BC_1, IO_8, OUTPUT3, X, 165, 0,Z),"&
" 165 (BC_1, *, CONTROL, X)," &
" 164 (BC_1, IO_9, INPUT, X)," &
" 163 (BC_1, IO_9, OUTPUT3, X, 162, 0,Z),"&
" 162 (BC_1, *, CONTROL, X)," &
" 161 (BC_1, IO_10, INPUT, X)," &
" 160 (BC_1, IO_10, OUTPUT3, X, 159, 0,Z),"&
" 159 (BC_1, *, CONTROL, X)," &
" 158 (BC_1, IO_11, INPUT, X)," &
" 157 (BC_1, IO_11, OUTPUT3, X, 156, 0,Z),"&
" 156 (BC_1, *, CONTROL, X)," &
" 155 (BC_1, IO_12, INPUT, X)," &
" 154 (BC_1, IO_12, OUTPUT3, X, 153, 0,Z),"&
" 153 (BC_1, *, CONTROL, X)," &
" 152 (BC_1, IO_13, INPUT, X)," &
" 151 (BC_1, IO_13, OUTPUT3, X, 150, 0,Z),"&
" 150 (BC_1, *, CONTROL, X)," &
" 149 (BC_1, IO_14, INPUT, X)," &
" 148 (BC_1, IO_14, OUTPUT3, X, 147, 0,Z),"&
" 147 (BC_1, *, CONTROL, X)," &
" 146 (BC_1, IO_15, INPUT, X)," &
" 145 (BC_1, IO_15, OUTPUT3, X, 144, 0,Z),"&
" 144 (BC_1, *, CONTROL, X)," &
" 143 (BC_1, IO_16, INPUT, X)," &
" 142 (BC_1, IO_16, OUTPUT3, X, 141, 0,Z),"&
" 141 (BC_1, *, CONTROL, X)," &
" 140 (BC_1, IO_17, INPUT, X)," &
" 139 (BC_1, IO_17, OUTPUT3, X, 138, 0,Z),"&
" 138 (BC_1, *, CONTROL, X)," &
" 137 (BC_1, IO_18, INPUT, X)," &
" 136 (BC_1, IO_18, OUTPUT3, X, 135, 0,Z),"&
" 135 (BC_1, *, CONTROL, X)," &
" 134 (BC_1, IO_19, INPUT, X)," &
" 133 (BC_1, IO_19, OUTPUT3, X, 132, 0,Z),"&
" 132 (BC_1, *, CONTROL, X)," &
" 131 (BC_1, IO_20, INPUT, X)," &
" 130 (BC_1, IO_20, OUTPUT3, X, 129, 0,Z),"&
" 129 (BC_1, *, CONTROL, X)," &
" 128 (BC_1, IO_21, INPUT, X)," &
" 127 (BC_1, IO_21, OUTPUT3, X, 126, 0,Z),"&
" 126 (BC_1, *, CONTROL, X)," &
" 125 (BC_1, IO_22, INPUT, X)," &
" 124 (BC_1, IO_22, OUTPUT3, X, 123, 0,Z),"&
" 123 (BC_1, *, CONTROL, X)," &
" 122 (BC_1, IO_23, INPUT, X)," &
" 121 (BC_1, IO_23, OUTPUT3, X, 120, 0,Z),"&
" 120 (BC_1, *, CONTROL, X)," &
" 119 (BC_1, IO_24, INPUT, X)," &
" 118 (BC_1, IO_24, OUTPUT3, X, 117, 0,Z),"&
" 117 (BC_1, *, CONTROL, X)," &
" 116 (BC_1, IO_25, INPUT, X)," &
" 115 (BC_1, IO_25, OUTPUT3, X, 114, 0,Z),"&
" 114 (BC_1, *, CONTROL, X)," &
" 113 (BC_1, IO_26, INPUT, X)," &
" 112 (BC_1, IO_26, OUTPUT3, X, 111, 0,Z),"&
" 111 (BC_1, *, CONTROL, X)," &
" 110 (BC_1, IO_27, INPUT, X)," &
" 109 (BC_1, IO_27, OUTPUT3, X, 108, 0,Z),"&
" 108 (BC_1, *, CONTROL, X)," &
" 107 (BC_1, IO_28, INPUT, X)," &
" 106 (BC_1, IO_28, OUTPUT3, X, 105, 0,Z),"&
" 105 (BC_1, *, CONTROL, X)," &
" 104 (BC_1, IO_29, INPUT, X)," &
" 103 (BC_1, IO_29, OUTPUT3, X, 102, 0,Z),"&
" 102 (BC_1, *, CONTROL, X)," &
" 101 (BC_1, IO_30, INPUT, X)," &
" 100 (BC_1, IO_30, OUTPUT3, X, 99, 0,Z),"&
" 99 (BC_1, *, CONTROL, X)," &
" 98 (BC_1, IO_31, INPUT, X)," &
" 97 (BC_1, IO_31, OUTPUT3, X, 96, 0,Z),"&
" 96 (BC_1, *, CONTROL, X)," &
" 95 (BC_1, IO_32, INPUT, X)," &
" 94 (BC_1, IO_32, OUTPUT3, X, 93, 0,Z),"&
" 93 (BC_1, *, CONTROL, X)," &
" 92 (BC_1, IO_33, INPUT, X)," &
" 91 (BC_1, IO_33, OUTPUT3, X, 90, 0,Z),"&
" 90 (BC_1, *, CONTROL, X)," &
" 89 (BC_1, IO_34, INPUT, X)," &
" 88 (BC_1, IO_34, OUTPUT3, X, 87, 0,Z),"&
" 87 (BC_1, *, CONTROL, X)," &
" 86 (BC_1, IO_35, INPUT, X)," &
" 85 (BC_1, IO_35, OUTPUT3, X, 84, 0,Z),"&
" 84 (BC_1, *, CONTROL, X)," &
" 83 (BC_1, IO_36, INPUT, X)," &
" 82 (BC_1, IO_36, OUTPUT3, X, 81, 0,Z),"&
" 81 (BC_1, *, CONTROL, X)," &
" 80 (BC_1, IO_37, INPUT, X)," &
" 79 (BC_1, IO_37, OUTPUT3, X, 78, 0,Z),"&
" 78 (BC_1, *, CONTROL, X)," &
" 77 (BC_1, IO_38, INPUT, X)," &
" 76 (BC_1, IO_38, OUTPUT3, X, 75, 0,Z),"&
" 75 (BC_1, *, CONTROL, X)," &
" 74 (BC_1, IO_39, INPUT, X)," &
" 73 (BC_1, IO_39, OUTPUT3, X, 72, 0,Z),"&
" 72 (BC_1, *, CONTROL, X)," &
" 71 (BC_1, IO_40, INPUT, X)," &
" 70 (BC_1, IO_40, OUTPUT3, X, 69, 0,Z),"&
" 69 (BC_1, *, CONTROL, X)," &
" 68 (BC_1, IO_41, INPUT, X)," &
" 67 (BC_1, IO_41, OUTPUT3, X, 66, 0,Z),"&
" 66 (BC_1, *, CONTROL, X)," &
" 65 (BC_1, IO_42, INPUT, X)," &
" 64 (BC_1, IO_42, OUTPUT3, X, 63, 0,Z),"&
" 63 (BC_1, *, CONTROL, X)," &
" 62 (BC_1, IO_43, INPUT, X)," &
" 61 (BC_1, IO_43, OUTPUT3, X, 60, 0,Z),"&
" 60 (BC_1, *, CONTROL, X)," &
" 59 (BC_1, IO_44, INPUT, X)," &
" 58 (BC_1, IO_44, OUTPUT3, X, 57, 0,Z),"&
" 57 (BC_1, *, CONTROL, X)," &
" 56 (BC_1, IO_45, INPUT, X)," &
" 55 (BC_1, IO_45, OUTPUT3, X, 54, 0,Z),"&
" 54 (BC_1, *, CONTROL, X)," &
" 53 (BC_1, IO_46, INPUT, X)," &
" 52 (BC_1, IO_46, OUTPUT3, X, 51, 0,Z),"&
" 51 (BC_1, *, CONTROL, X)," &
" 50 (BC_1, IO_47, INPUT, X)," &
" 49 (BC_1, IO_47, OUTPUT3, X, 48, 0,Z),"&
" 48 (BC_1, *, CONTROL, X)," &
" 47 (BC_1, IO_48, INPUT, X)," &
" 46 (BC_1, IO_48, OUTPUT3, X, 45, 0,Z),"&
" 45 (BC_1, *, CONTROL, X)," &
" 44 (BC_1, IO_49, INPUT, X)," &
" 43 (BC_1, IO_49, OUTPUT3, X, 42, 0,Z),"&
" 42 (BC_1, *, CONTROL, X)," &
" 41 (BC_1, IO_50, INPUT, X)," &
" 40 (BC_1, IO_50, OUTPUT3, X, 39, 0,Z),"&
" 39 (BC_1, *, CONTROL, X)," &
" 38 (BC_1, IO_51, INPUT, X)," &
" 37 (BC_1, IO_51, OUTPUT3, X, 36, 0,Z),"&
" 36 (BC_1, *, CONTROL, X)," &
" 35 (BC_1, IO_52, INPUT, X)," &
" 34 (BC_1, IO_52, OUTPUT3, X, 33, 0,Z),"&
" 33 (BC_1, *, CONTROL, X)," &
" 32 (BC_1, IO_53, INPUT, X)," &
" 31 (BC_1, IO_53, OUTPUT3, X, 30, 0,Z),"&
" 30 (BC_1, *, CONTROL, X)," &
" 29 (BC_1, IO_54, INPUT, X)," &
" 28 (BC_1, IO_54, OUTPUT3, X, 27, 0,Z),"&
" 27 (BC_1, *, CONTROL, X)," &
" 26 (BC_1, IO_55, INPUT, X)," &
" 25 (BC_1, IO_55, OUTPUT3, X, 24, 0,Z),"&
" 24 (BC_1, *, CONTROL, X)," &
" 23 (BC_1, IO_56, INPUT, X)," &
" 22 (BC_1, IO_56, OUTPUT3, X, 21, 0,Z),"&
" 21 (BC_1, *, CONTROL, X)," &
" 20 (BC_1, IO_57, INPUT, X)," &
" 19 (BC_1, IO_57, OUTPUT3, X, 18, 0,Z),"&
" 18 (BC_1, *, CONTROL, X)," &
" 17 (BC_1, IO_58, INPUT, X)," &
" 16 (BC_1, IO_58, OUTPUT3, X, 15, 0,Z),"&
" 15 (BC_1, *, CONTROL, X)," &
" 14 (BC_1, IO_59, INPUT, X)," &
" 13 (BC_1, IO_59, OUTPUT3, X, 12, 0,Z),"&
" 12 (BC_1, *, CONTROL, X)," &
" 11 (BC_1, IO_60, INPUT, X)," &
" 10 (BC_1, IO_60, OUTPUT3, X, 9, 0,Z),"&
" 9 (BC_1, *, CONTROL, X)," &
" 8 (BC_1, IO_61, INPUT, X)," &
" 7 (BC_1, IO_61, OUTPUT3, X, 6, 0,Z),"&
" 6 (BC_1, *, CONTROL, X)," &
" 5 (BC_1, IO_62, INPUT, X)," &
" 4 (BC_1, IO_62, OUTPUT3, X, 3, 0,Z),"&
" 3 (BC_1, *, CONTROL, X)," &
" 2 (BC_1, IO_63, INPUT, X)," &
" 1 (BC_1, IO_63, OUTPUT3, X, 0, 0,Z),"&
" 0 (BC_1, *, CONTROL, X)" ;
end xc2c64a;