Subversion Repositories diogenes

Release 9.2i - xst J.36
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.
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Parameter TMPDIR set to ./xst/projnav.tmp
CPU : 0.00 / 0.06 s | Elapsed : 0.00 / 0.00 s
 
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "/home/andi/xilinx/rs232/types.vhd" in Library work.
Architecture types of Entity types is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/alu.vhd" in Library work.
Architecture behavioral of Entity alu is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/cmp.vhd" in Library work.
Architecture behavioral of Entity cmp is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/regfile.vhd" in Library work.
Architecture behavioral of Entity regfile is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/pmem.vhd" in Library work.
Architecture pmem_a of Entity pmem is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/fetch.vhd" in Library work.
Architecture behavioral of Entity fetch is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/decode.vhd" in Library work.
Architecture behavioral of Entity decode is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/execute.vhd" in Library work.
Architecture behavioral of Entity execute is up to date.
Compiling vhdl file "/home/andi/xilinx/rs232/cpu/cpu.vhd" in Library work.
Entity <cpu> compiled.
Entity <cpu> (Architecture <Behavioral>) compiled.
CPU : 0.21 / 0.27 s | Elapsed : 0.00 / 0.00 s
 
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Total memory usage is 97052 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)