Subversion Repositories diogenes

Release 9.2i Map J.36
Xilinx Mapping Report File for Design 'mysio'

Design Information
------------------
Command Line   : map -ise /home/andi/xilinx/diogenes/vhdl/rs232.ise -intstyle
ise -p xc3s500e-fg320-4 -cm area -pr b -k 4 -c 100 -o mysio_map.ncd mysio.ngd
mysio.pcf 
Target Device  : xc3s500e
Target Package : fg320
Target Speed   : -4
Mapper Version : spartan3e -- $Revision: 1.1.1.1 $
Mapped Date    : Mon Jan 28 21:05:16 2008

Design Summary
--------------
Number of errors:      0
Number of warnings:    4
Logic Utilization:
  Total Number Slice Registers:       413 out of   9,312    4%
    Number used as Flip Flops:                   397
    Number used as Latches:                       16
  Number of 4 input LUTs:           1,263 out of   9,312   13%
Logic Distribution:
  Number of occupied Slices:                          784 out of   4,656   16%
    Number of Slices containing only related logic:     784 out of     784  100%
    Number of Slices containing unrelated logic:          0 out of     784    0%
      *See NOTES below for an explanation of the effects of unrelated logic
Total Number of 4 input LUTs:          1,449 out of   9,312   15%
  Number used as logic:              1,263
  Number used as a route-thru:          57
  Number used for Dual Port RAMs:      128
    (Two LUTs used per Dual Port RAM)
  Number used as Shift registers:        1
  Number of bonded IOBs:               35 out of     232   15%
    IOB Flip Flops:                    21
  Number of Block RAMs:                7 out of      20   35%
  Number of GCLKs:                     1 out of      24    4%

Total equivalent gate count for design:  479,243
Additional JTAG gate count for IOBs:  1,680
Peak Memory Usage:  153 MB
Total REAL time to MAP completion:  6 secs 
Total CPU time to MAP completion:   6 secs 

NOTES:

   Related logic is defined as being logic that shares connectivity - e.g. two
   LUTs are "related" if they share common inputs.  When assembling slices,
   Map gives priority to combine logic that is related.  Doing so results in
   the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin packing
   unrelated logic into a slice once 99% of the slices are occupied through
   related logic packing.

   Note that once logic distribution reaches the 99% level through related
   logic packing, this does not mean the device is completely utilized.
   Unrelated logic packing will then begin, continuing until all usable LUTs
   and FFs are occupied.  Depending on your timing budget, increased levels of
   unrelated logic packing may adversely affect the overall timing performance
   of your design.

Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group and Partition Summary
Section 10 - Modular Design Summary
Section 11 - Timing Report
Section 12 - Configuration String Information
Section 13 - Control Set Information

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:LIT:243 - Logical network diogenes_cpu/pipestage2/rf/reg1/N1 has no
   load.
WARNING:LIT:395 - The above warning message base_net_load_rule is repeated 136
   more times for the following (max. 5 shown):
   diogenes_cpu/pipestage2/rf/reg1/N0,
   diogenes_cpu/pipestage2/rf/reg1/BU2/qdpo<0>,
   diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<31>,
   diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<30>,
   diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<29>
   To see the details of these warning messages, please use the -detail switch.
WARNING:PhysDesignRules:812 - Dangling pin <DOA14> on
   block:<diogenes_cpu/pipestage3/cdmem/B10/diogenes_cpu/pipestage3/cdmem/B10.A>
   :<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA15> on
   block:<diogenes_cpu/pipestage3/cdmem/B10/diogenes_cpu/pipestage3/cdmem/B10.A>
   :<RAMB16_RAMB16A>.

Section 3 - Informational
-------------------------
INFO:MapLib:562 - No environment variables are currently set.
INFO:MapLib:863 - The following Virtex BUFG(s) is/are being retargeted to
   Virtex2 BUFGMUX(s) with input tied to I0 and Select pin tied to constant 0:
   BUFGP symbol "gclk_BUFGP" (output signal=gclk_BUFGP)
INFO:MapLib:159 - Net Timing constraints on signal gclk are pushed forward
   through input buffer.

Section 4 - Removed Logic Summary
---------------------------------
 266 block(s) removed
  10 block(s) optimized away
 395 signal(s) removed

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

The signal "diogenes_cpu/pipestage2/rf/reg1/spo<31>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_31" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<31>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<30>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_30" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<30>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<29>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_29" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<29>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<28>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_28" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<28>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<27>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_27" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<27>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<26>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_26" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<26>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<25>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_25" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<25>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<24>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_24" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<24>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<23>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_23" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<23>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<22>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_22" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<22>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<21>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_21" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<21>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<20>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_20" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<20>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<19>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_19" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<19>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<18>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_18" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<18>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<17>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_17" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<17>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<16>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_16" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<16>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<15>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_15" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<15>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<14>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_14" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<14>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<13>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_13" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<13>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<12>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_12" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<12>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<11>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_11" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<11>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<10>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_10" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<10>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<9>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_9" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<9>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<8>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_8" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<8>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<7>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_7" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<7>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<6>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_6" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<6>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<5>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_5" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<5>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<4>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_4" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<4>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<3>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_3" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<3>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<2>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_2" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<2>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<1>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_1" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<1>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/spo<0>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_0" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<0>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/N1" is sourceless and has been
removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/N0" is sourceless and has been
removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/qdpo<0>" is sourceless and has
been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N132"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX31111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N4" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N130"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N131"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N128"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX3011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N126"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N127"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N124"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N122"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N123"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N120"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N118"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N119"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N116"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N114"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N115"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N112"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2611"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N110"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N111"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N108"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2511"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N106"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N107"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N104"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2411"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N102"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N103"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N100"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2311"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N98" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N99" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N96" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2211"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N94" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N95" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N92" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX21111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N90" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N91" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N88" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N86" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N87" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N84" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N82" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N83" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N80" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N78" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N79" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N76" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N74" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N75" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N72" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1611"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N70" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N71" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N68" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1511"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N66" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N67" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N64" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1411"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N62" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N63" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N60" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1311"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N58" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N59" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N56" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1211"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N54" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N55" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N52" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX11111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N50" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N51" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N48" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N46" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N47" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N44" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N42" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N43" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N40" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N38" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N39" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N36" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N34" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N35" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N32" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX6111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N30" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N31" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N28" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX5111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N26" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N27" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N24" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX4111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N22" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N23" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N20" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX3111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N18" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N19" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N16" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N14" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N15" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N12" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N10" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N11" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N6" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX11"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N7" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/N8" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<31>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<30>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<29>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<28>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<27>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<26>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<25>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<24>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<23>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<22>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<21>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<20>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<19>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<18>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<17>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<16>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<15>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<14>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<13>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<12>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<11>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<10>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<9>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<8>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<7>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<6>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<5>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<4>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<3>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<2>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<1>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<0>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg1/BU2/N67" is sourceless and has been
removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<31>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_31" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<31>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<30>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_30" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<30>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<29>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_29" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<29>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<28>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_28" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<28>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<27>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_27" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<27>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<26>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_26" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<26>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<25>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_25" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<25>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<24>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_24" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<24>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<23>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_23" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<23>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<22>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_22" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<22>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<21>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_21" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<21>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<20>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_20" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<20>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<19>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_19" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<19>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<18>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_18" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<18>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<17>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_17" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<17>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<16>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_16" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<16>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<15>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_15" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<15>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<14>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_14" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<14>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<13>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_13" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<13>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<12>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_12" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<12>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<11>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_11" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<11>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<10>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_10" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<10>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<9>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_9" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<9>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<8>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_8" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<8>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<7>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_7" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<7>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<6>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_6" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<6>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<5>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_5" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<5>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<4>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_4" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<4>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<3>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_3" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<3>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<2>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_2" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<2>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<1>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_1" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<1>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/spo<0>" is sourceless and has been
removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int_0" (FF)
removed.
  The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qspo_int<0>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/N1" is sourceless and has been
removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/N0" is sourceless and has been
removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/qdpo<0>" is sourceless and has
been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N132"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX31111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N4" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N130"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N131"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N128"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX3011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N126"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N127"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N124"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N122"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N123"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N120"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N118"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N119"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N116"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N114"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N115"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N112"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2611"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N110"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N111"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N108"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2511"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N106"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N107"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N104"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2411"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N102"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N103"
is sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N100"
is sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2311"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N98" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N99" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N96" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2211"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N94" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N95" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N92" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX21111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N90" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N91" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N88" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N86" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N87" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N84" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N82" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N83" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N80" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N78" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N79" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N76" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N74" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N75" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N72" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1611"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N70" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N71" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N68" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1511"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N66" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N67" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N64" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1411"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N62" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N63" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N60" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1311"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N58" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N59" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N56" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1211"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N54" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N55" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N52" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX11111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N50" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N51" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N48" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1011"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N46" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N47" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N44" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX911"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N42" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N43" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N40" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX811"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N38" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N39" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N36" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX711"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N34" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N35" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N32" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX6111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N30" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N31" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N28" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX5111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N26" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N27" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N24" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX4111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N22" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N23" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N20" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX3111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N18" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N19" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N16" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX2111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N14" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N15" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N12" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX1111"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N10" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N11" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N6" is
sourceless and has been removed.
 Sourceless block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_LPM_MUX11"
(ROM) removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N7" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/N8" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<31>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<30>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<29>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<28>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<27>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<26>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<25>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<24>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<23>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<22>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<21>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<20>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<19>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<18>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<17>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<16>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<15>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<14>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<13>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<12>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<11>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<10>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<9>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<8>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<7>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<6>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<5>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<4>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<3>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<2>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<1>" is
sourceless and has been removed.
The signal
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int<0>" is
sourceless and has been removed.
The signal "diogenes_cpu/pipestage2/rf/reg2/BU2/N67" is sourceless and has been
removed.
The signal "vga_c/video_ram_c/douta<7>" is sourceless and has been removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem10"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem12"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem14"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem16"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem18"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem2" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem20"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem22"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem24"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem26"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem28"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem30"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem32"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem34"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem36"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem38"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem4" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem40"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem42"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem44"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem46"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem48"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem50"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem52"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem54"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem56"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem58"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem6" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem60"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem62"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem8" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_0" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_1" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_10" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_11" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_12" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_13" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_14" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_15" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_16" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_17" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_18" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_19" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_2" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_20" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_21" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_22" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_23" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_24" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_25" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_26" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_27" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_28" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_29" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_3" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_30" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_31" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_4" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_5" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_6" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_7" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_8" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_9" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/write_ctrl" (ROM)
removed.
Unused block "diogenes_cpu/pipestage2/rf/reg1/BU2/XST_GND" (ZERO) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg1/BU2/XST_VCC" (ONE) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg1/GND" (ZERO) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg1/VCC" (ONE) removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem10"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem12"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem14"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem16"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem18"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem2" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem20"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem22"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem24"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem26"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem28"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem30"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem32"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem34"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem36"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem38"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem4" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem40"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem42"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem44"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem46"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem48"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem50"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem52"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem54"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem56"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem58"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem6" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem60"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem62"
() removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/inst_Mram_mem8" ()
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_0" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_1" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_10" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_11" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_12" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_13" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_14" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_15" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_16" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_17" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_18" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_19" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_2" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_20" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_21" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_22" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_23" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_24" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_25" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_26" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_27" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_28" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_29" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_3" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_30" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_31" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_4" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_5" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_6" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_7" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_8" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/qdpo_int_9" (FF)
removed.
Unused block
"diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/write_ctrl" (ROM)
removed.
Unused block "diogenes_cpu/pipestage2/rf/reg2/BU2/XST_GND" (ZERO) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg2/BU2/XST_VCC" (ONE) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg2/GND" (ZERO) removed.
Unused block "diogenes_cpu/pipestage2/rf/reg2/VCC" (ONE) removed.

Optimized Block(s):
TYPE            BLOCK
GND             XST_GND
VCC             XST_VCC
LUT2            diogenes_cpu/pipestage2/rf/reg1/BU2/U0/gen_dp_ram.dpram_inst/write_ctrl1
LUT2            diogenes_cpu/pipestage2/rf/reg2/BU2/U0/gen_dp_ram.dpram_inst/write_ctrl1
GND             diogenes_cpu/pipestage3/cdmem/GND
VCC             diogenes_cpu/pipestage3/cdmem/VCC
GND             pmemc/GND
VCC             pmemc/VCC
GND             vga_c/video_ram_c/GND
VCC             vga_c/video_ram_c/VCC

To enable printing of redundant blocks removed and signals merged, set the
detailed map report option and rerun map.

Section 6 - IOB Properties
--------------------------

+-----------------------------------------------------------------------------------------------------------------------------------------+
| IOB Name                           | IOB Type         | Direction | IO Standard | Drive    | Slew | Reg (s)      | Resistor | IBUF/IFD  |
|                                    |                  |           |             | Strength | Rate |              |          | Delay     |
+-----------------------------------------------------------------------------------------------------------------------------------------+
| blue                               | IOB              | OUTPUT    | LVTTL       | 2        | FAST | OFF1         |          | 0 / 0     |
| button<0>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLDOWN | 0 / 0     |
| button<1>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLDOWN | 0 / 0     |
| button<2>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLDOWN | 0 / 0     |
| button<3>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLDOWN | 0 / 0     |
| button<4>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLUP   | 0 / 0     |
| button<5>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLUP   | 0 / 0     |
| button<6>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLDOWN | 0 / 0     |
| button<7>                          | IBUF             | INPUT     | LVTTL       |          |      |              | PULLUP   | 0 / 0     |
| gclk                               | IBUF             | INPUT     | LVTTL       |          |      |              |          | 0 / 0     |
| green                              | IOB              | OUTPUT    | LVTTL       | 2        | FAST | OFF1         |          | 0 / 0     |
| hs                                 | IOB              | OUTPUT    | LVTTL       | 2        | FAST | OFF1         |          | 0 / 0     |
| lcd_d<0>                           | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_d<1>                           | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_d<2>                           | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_d<3>                           | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_e                              | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_rs                             | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| lcd_rw                             | IOB              | OUTPUT    | LVTTL       | 2        | SLOW | OFF1         |          | 0 / 0     |
| red                                | IOB              | OUTPUT    | LVTTL       | 2        | FAST | OFF1         |          | 0 / 0     |
| reset                              | IBUF             | INPUT     | LVTTL       |          |      |              | PULLUP   | 0 / 0     |
| rx                                 | IBUF             | INPUT     | LVTTL       |          |      |              |          | 0 / 0     |
| strataflash_ce                     | IOB              | OUTPUT    | LVTTL       | 2        | SLOW |              |          | 0 / 0     |
| strataflash_oe                     | IOB              | OUTPUT    | LVTTL       | 2        | SLOW |              |          | 0 / 0     |
| strataflash_we                     | IOB              | OUTPUT    | LVTTL       | 2        | SLOW |              |          | 0 / 0     |
| test<0>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<1>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<2>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<3>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<4>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<5>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<6>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| test<7>                            | IOB              | OUTPUT    | LVTTL       | 4        | FAST | OFF1         |          | 0 / 0     |
| tx                                 | IOB              | OUTPUT    | LVTTL       | 4        | SLOW | OFF1         |          | 0 / 0     |
| vs                                 | IOB              | OUTPUT    | LVTTL       | 2        | FAST | OFF1         |          | 0 / 0     |
+-----------------------------------------------------------------------------------------------------------------------------------------+

Section 7 - RPMs
----------------

Section 8 - Guide Report
------------------------
Guide not run on this design.

Section 9 - Area Group and Partition Summary
--------------------------------------------

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

Area Group Information
----------------------

  No area groups were found in this design.


----------------------

Section 10 - Modular Design Summary
-----------------------------------
Modular Design not used for this design.

Section 11 - Timing Report
--------------------------
This design was not run using timing mode.

Section 12 - Configuration String Details
-----------------------------------------
Use the "-detail" map option to print out Configuration Strings

Section 13 - Control Set Information
------------------------------------
No control set information for this architecture.