OpenCores
URL https://opencores.org/ocsvn/diogenes/diogenes/trunk

Subversion Repositories diogenes

[/] [diogenes/] [trunk/] [vhdl/] [cpu/] [_pace.ucf] - Rev 238

Go to most recent revision | Compare with Previous | Blame | View Log

#NET "clk_in" TNM_NET = "clk_in";
#TIMESPEC "TS_clk_in" = PERIOD "clk_in" 10 ns HIGH 50 %;
#INST "clk_in_BUFGP" LOC = "BUFGMUX4"  ;
#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clk_in"  LOC = "P180"  ; 
NET "extaddr<0>"  LOC = "P178"  ; 
NET "extaddr<1>"  LOC = "P176"  ; 
NET "extaddr<2>"  LOC = "P175"  ; 
NET "extaddr<3>"  LOC = "P172"  ; 
NET "extaddr<4>"  LOC = "P171"  ; 
NET "extaddr<5>"  LOC = "P169"  ; 
NET "extaddr<6>"  LOC = "P168"  ; 
NET "extaddr<7>"  LOC = "P167"  ; 
NET "extdata<0>"  LOC = "P2"  ; 
NET "extdata<1>"  LOC = "P3"  ; 
NET "extdata<2>"  LOC = "P4"  ; 
NET "extdata<3>"  LOC = "P5"  ; 
NET "extdata<4>"  LOC = "P7"  ; 
NET "extdata<5>"  LOC = "P9"  ; 
NET "extdata<6>"  LOC = "P10"  ; 
NET "extdata<7>"  LOC = "P11"  ; 
NET "exten"  LOC = "P62"  ; 
NET "extwe"  LOC = "P61"  ; 
NET "reset_in"  LOC = "P183"  ; 

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.