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-- $Id: SYMBOL_DETECTOR.vhd,v 1.1.1.1 2005-03-30 10:09:49 petebleackley Exp $ $Name: not supported by cvs2svn $
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
 
entity SYMBOL_DETECTOR is
    Port ( ENABLE : in std_logic;
           DATA_IN : in std_logic_vector(15 downto 0);
           THRESHOLD : in std_logic_vector(15 downto 0);
           DATA_OUT : out std_logic);
end SYMBOL_DETECTOR;
 
architecture RTL of SYMBOL_DETECTOR is
 
begin
DECODE:	process(ENABLE,DATA_IN,THRESHOLD)
	begin
	if ((ENABLE = '1') and (DATA_IN >= THRESHOLD)) then
		DATA_OUT <= '1';
	else
		DATA_OUT <= '0';
	end if;
end process DECODE;
 
 
 
 
end RTL;