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\chapter{Introduction} The ECO32 is a general-purpose 32-bit RISC soft-core microprocessor, to be implemented on an FPGA. It was originally designed to understand the RISC architecture as described by Hennessy and Patterson in their books. The current version is a simple, albeit slow implementation of the instruction set architecture described in this manual. Future versions will include various optimizations to make the ECO32 feasible for real-world projects. \section{Features} The \eco supports the following features: \begin{itemize} \item Soft-core processor to be implemented on an FPGA \item 32 general-purpose registers, each 32 bits wide \item 32-bit ALU, shifter, multiplication and division units \item load/store architecture \item 32-bit unified instruction and data address space \item 16 external interrupt lines \item two privilege modes to execute both trusted and untrusted code \item paged virtual memory with a page size of 4K \item assembler, instruction-set simulator, and C compiler support \end{itemize} \section{Requirements} So far, the \eco has only been implemented on a Xilinx Spartan-3 FPGA. Implementing it on other FPGAs may cause problems if the \eco uses device primitives that are not supported on the target platform.
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