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https://opencores.org/ocsvn/ecpu_alu/ecpu_alu/trunk
Subversion Repositories ecpu_alu
[/] [ecpu_alu/] [trunk/] [alu/] [sim/] [run_alu] - Rev 5
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#! /usr/bin/vvp:vpi_time_precision - 12;:vpi_module "system";:vpi_module "v2005_math";:vpi_module "va_math";S_0x1c43f20 .scope module, "alu_tb" "alu_tb" 2 52;.timescale -9 -12;P_0x1cbf258 .param/l "DWIDTH" 2 55, +C4<01000>;P_0x1cbf280 .param/l "OPWIDTH" 2 56, +C4<0100>;v0x1ccb3d0_0 .var "A", 7 0;v0x1ccb470_0 .var "A_u", 7 0;v0x1ccb510_0 .var "B", 7 0;v0x1ccb590_0 .var "B_u", 7 0;v0x1ccb610_0 .net "C", 0 0, v0x1c91380_0; 1 driversv0x1ccb690_0 .var "CLK", 0 0;v0x1ccb710_0 .var "CLR", 0 0;v0x1ccb790_0 .var "S", 3 0;v0x1ccb810_0 .net "V", 0 0, v0x1c91060_0; 1 driversv0x1ccb890_0 .net/s "Y", 7 0, v0x1cb3600_0; 1 driversv0x1ccb910_0 .var "Y_u", 7 0;v0x1ccb990_0 .net "Z", 0 0, v0x1c8a150_0; 1 driversv0x1ccba10_0 .var "aa", 7 0;v0x1ccbab0_0 .var "bb", 7 0;v0x1ccbbb0_0 .var "check_here", 0 0;v0x1ccbc50_0 .var "clrc", 0 0;v0x1ccbb30_0 .var/i "count", 31 0;v0x1ccbd60_0 .var/i "errors_found", 31 0;v0x1ccbcd0_0 .var "finished", 0 0;v0x1ccbe80_0 .var/i "infile", 31 0;v0x1ccbde0_0 .var "last_CLR", 0 0;v0x1ccbfb0_0 .var "last_ss", 31 0;v0x1ccbf00_0 .var "op1", 7 0;v0x1ccc0f0_0 .var "op2", 7 0;v0x1ccc030 .array "opcode_list", 15 0, 32 1;v0x1ccc4b0_0 .var/i "outfile", 31 0;v0x1ccc170_0 .var/i "random_count", 31 0;v0x1ccc610_0 .var "random_mode", 0 0;v0x1ccc530_0 .var/i "random_number", 31 0;v0x1ccc780_0 .var/s "result", 7 0;v0x1ccc690_0 .var "result_u", 7 0;v0x1ccc900_0 .var "ss", 31 0;v0x1ccc800_0 .var "started", 0 0;v0x1ccc880_0 .var/i "success", 31 0;E_0x1c90700 .event posedge, v0x1cbee90_0;E_0x1cbe000 .event posedge, v0x1ccbcd0_0, v0x1cbee90_0;E_0x1cbe950 .event edge, v0x1cbee90_0;S_0x1ccaf50 .scope function, "bas" "bas" 2 480, 2 480, S_0x1c43f20;.timescale -9 -12;v0x1ccb030_0 .var "a1", 7 0;v0x1ccb0d0_0 .var "bas", 7 0;v0x1ccb170_0 .var "direction", 0 0;v0x1ccb210_0 .var "shift_size", 7 0;v0x1ccb290_0 .var "tmp", 7 0;v0x1ccb330_0 .var/i "tmp2", 31 0;TD_alu_tb.bas ;%load/v 8, v0x1ccb030_0, 8;%set/v v0x1ccb290_0, 8, 8;%load/v 8, v0x1ccb210_0, 3; Only need 3 of 8 bits; Save base=8 wid=3 in lookaside.%mov 11, 8, 3;%mov 14, 0, 29;%set/v v0x1ccb330_0, 11, 32;T_0.0 ;%load/v 8, v0x1ccb330_0, 32;%cmp/s 0, 8, 32;%jmp/0xz T_0.1, 5;%load/v 8, v0x1ccb170_0, 1;%jmp/0xz T_0.2, 8;%ix/load 1, 1;%mov 4, 0, 1;%load/x1p 16, v0x1ccb290_0, 7;; Save base=16 wid=7 in lookaside.%mov 8, 16, 7;%load/v 16, v0x1ccb290_0, 1; Only need 1 of 8 bits; Save base=16 wid=1 in lookaside.%mov 15, 16, 1;%set/v v0x1ccb290_0, 8, 8;%jmp T_0.3;T_0.2 ;%ix/load 1, 7;%mov 4, 0, 1;%load/x1p 16, v0x1ccb290_0, 1;; Save base=16 wid=1 in lookaside.%mov 8, 16, 1;%load/v 16, v0x1ccb290_0, 7; Only need 7 of 8 bits; Save base=16 wid=7 in lookaside.%mov 9, 16, 7;%set/v v0x1ccb290_0, 8, 8;T_0.3 ;%load/v 8, v0x1ccb330_0, 32;%mov 40, 8, 32;%mov 72, 39, 1;%subi 40, 1, 33;%set/v v0x1ccb330_0, 40, 32;%jmp T_0.0;T_0.1 ;%load/v 8, v0x1ccb290_0, 8;%set/v v0x1ccb0d0_0, 8, 8;%end;S_0x1ccacf0 .scope function, "get_random_opcode" "get_random_opcode" 2 467, 2 467, S_0x1c43f20;.timescale -9 -12;v0x1ccadd0_0 .var "get_random_opcode", 32 1;v0x1ccae50_0 .var/s "myseed", 31 0;v0x1ccaed0_0 .var/i "tmp", 31 0;TD_alu_tb.get_random_opcode ;%vpi_func 2 472 "$random", 8, 32, v0x1ccae50_0;%set/v v0x1ccaed0_0, 8, 32;%load/v 40, v0x1ccaed0_0, 32;%movi 72, 11, 32;%mod 40, 72, 32;%ix/get 3, 40, 32;%load/av 8, v0x1ccc030, 32;%set/v v0x1ccadd0_0, 8, 32;%end;S_0x1ccaa90 .scope function, "string2opcode" "string2opcode" 2 438, 2 438, S_0x1c43f20;.timescale -9 -12;v0x1ccab70_0 .var "opcode", 3 0;v0x1ccabf0_0 .var "s", 31 0;v0x1ccac70_0 .var "string2opcode", 3 0;TD_alu_tb.string2opcode ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 0;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.4, 8;%set/v v0x1ccab70_0, 0, 4;%jmp T_2.5;T_2.4 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 1;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.6, 8;%movi 8, 1, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.7;T_2.6 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 9;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.8, 8;%movi 8, 9, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.9;T_2.8 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 2;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.10, 8;%movi 8, 2, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.11;T_2.10 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 3;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.12, 8;%movi 8, 3, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.13;T_2.12 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 4;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.14, 8;%movi 8, 4, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.15;T_2.14 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 5;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.16, 8;%movi 8, 5, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.17;T_2.16 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 6;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.18, 8;%movi 8, 6, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.19;T_2.18 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 7;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.20, 8;%movi 8, 7, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.21;T_2.20 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 8;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.22, 8;%movi 8, 8, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.23;T_2.22 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 10;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.24, 8;%movi 8, 10, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.25;T_2.24 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 11;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.26, 8;%movi 8, 11, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.27;T_2.26 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 12;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.28, 8;%movi 8, 12, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.29;T_2.28 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 13;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.30, 8;%movi 8, 13, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.31;T_2.30 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 14;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.32, 8;%movi 8, 14, 4;%set/v v0x1ccab70_0, 8, 4;%jmp T_2.33;T_2.32 ;%load/v 8, v0x1ccabf0_0, 32;%ix/load 3, 15;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_2.34, 8;%set/v v0x1ccab70_0, 1, 4;T_2.34 ;T_2.33 ;T_2.31 ;T_2.29 ;T_2.27 ;T_2.25 ;T_2.23 ;T_2.21 ;T_2.19 ;T_2.17 ;T_2.15 ;T_2.13 ;T_2.11 ;T_2.9 ;T_2.7 ;T_2.5 ;%load/v 8, v0x1ccab70_0, 4;%set/v v0x1ccac70_0, 8, 4;%end;S_0x1cca7b0 .scope module, "this_record" "test_vector" 2 135, 2 41, S_0x1c43f20;.timescale -9 -12;P_0x1c3ef28 .param/l "DWIDTH" 2 42, +C4<01000>;P_0x1c3ef50 .param/l "OPWIDTH" 2 43, +C4<0100>;v0x1cca890_0 .var/s "A", 7 0;v0x1cca910_0 .var/s "B", 7 0;v0x1cca990_0 .var "S", 31 0;v0x1ccaa10_0 .var "Y", 7 0;S_0x1cca4d0 .scope module, "next_record" "test_vector" 2 136, 2 41, S_0x1c43f20;.timescale -9 -12;P_0x1c5f7a8 .param/l "DWIDTH" 2 42, +C4<01000>;P_0x1c5f7d0 .param/l "OPWIDTH" 2 43, +C4<0100>;v0x1cca5b0_0 .var/s "A", 7 0;v0x1cca630_0 .var/s "B", 7 0;v0x1cca6b0_0 .var "S", 31 0;v0x1cca730_0 .var "Y", 7 0;S_0x1cab560 .scope module, "alu_inst0" "alu" 2 139, 3 4, S_0x1c43f20;.timescale -9 -12;P_0x1cbf098 .param/l "DWIDTH" 3 6, +C4<01000>;P_0x1cbf0c0 .param/l "OPWIDTH" 3 7, +C4<0100>;L_0x1cca180 .functor BUFZ 1, v0x1ccb710_0, C4<0>, C4<0>, C4<0>;v0x1cc9140_0 .net "A", 7 0, v0x1ccb3d0_0; 1 driversv0x1cc91f0_0 .net "B", 7 0, v0x1ccb510_0; 1 driversv0x1cc92a0_0 .alias "C", 0 0, v0x1ccb610_0;v0x1cc9350_0 .net "CLK", 0 0, v0x1ccb690_0; 1 driversv0x1cc9400_0 .net "CLR", 0 0, v0x1ccb710_0; 1 driversv0x1cc9480_0 .net "S", 3 0, v0x1ccb790_0; 1 driversv0x1cc9500_0 .alias "V", 0 0, v0x1ccb810_0;v0x1cc95b0_0 .alias "Y", 7 0, v0x1ccb890_0;v0x1cc9660_0 .alias "Z", 0 0, v0x1ccb990_0;v0x1cc9710_0 .net "add_AB", 0 0, L_0x1cccaa0; 1 driversv0x1cc9790_0 .net "and_AB", 0 0, L_0x1ccd430; 1 driversv0x1cc9810_0 .net "clr_ALL", 0 0, L_0x1ccd010; 1 driversv0x1cc9890_0 .net "clr_C", 0 0, C4<z>; 0 driversv0x1cc9910_0 .net "clr_V", 0 0, C4<z>; 0 driversv0x1cc9a10_0 .net "clr_Z", 0 0, C4<z>; 0 driversv0x1cc9a90_0 .net "cmp_AB", 0 0, L_0x1cccd20; 1 driversv0x1cc9990_0 .net "cpl_A", 0 0, L_0x1ccd1f0; 1 driversv0x1cc9ba0_0 .net "cpl_B", 0 0, L_0x1ccd4d0; 1 driversv0x1cc9b10_0 .net "dec_A", 0 0, L_0x1ccd150; 1 driversv0x1cc9cc0_0 .net "dec_B", 0 0, L_0x1ccd0b0; 1 driversv0x1cc9c20_0 .net "inc_A", 0 0, L_0x1cccb40; 1 driversv0x1cc9df0_0 .net "inc_B", 0 0, L_0x1cccbe0; 1 driversv0x1cc9d40_0 .net "load_inputs", 0 0, v0x1cc8940_0; 1 driversv0x1cc9f30_0 .net "load_outputs", 0 0, v0x1cc89f0_0; 1 driversv0x1cc9e70_0 .net "mul_AB", 0 0, L_0x1ccd2b0; 1 driversv0x1cca080_0 .net "or_AB", 0 0, L_0x1ccd350; 1 driversv0x1cc9fb0_0 .net "reset", 0 0, L_0x1cca180; 1 driversv0x1cca1e0_0 .net "sl_AB", 0 0, L_0x1cccdc0; 1 driversv0x1cca100_0 .net "sr_AB", 0 0, L_0x1cccee0; 1 driversv0x1cca350_0 .net "sub_AB", 0 0, L_0x1cccc80; 1 driversv0x1cca260_0 .net "xor_AB", 0 0, L_0x1ccd5d0; 1 driversS_0x1cc7aa0 .scope module, "controller" "alu_controller" 3 53, 4 4, S_0x1cab560;.timescale -9 -12;P_0x1c91288 .param/l "OPBITS" 4 36, C4<00000000000000000000000000010000>;P_0x1c912b0 .param/l "OPWIDTH" 4 35, +C4<0100>;v0x1cc7b80_0 .alias "add_AB", 0 0, v0x1cc9710_0;v0x1cc80f0_0 .alias "and_AB", 0 0, v0x1cc9790_0;v0x1cc8170_0 .alias "clk", 0 0, v0x1cc9350_0;v0x1cc81f0_0 .alias "clr", 0 0, v0x1cc9810_0;v0x1cc82a0_0 .alias "clr_C", 0 0, v0x1cc9890_0;v0x1cc8350_0 .alias "clr_V", 0 0, v0x1cc9910_0;v0x1cc83d0_0 .alias "clr_Z", 0 0, v0x1cc9a10_0;v0x1cc8480_0 .alias "cmp_AB", 0 0, v0x1cc9a90_0;v0x1cc8530_0 .alias "cpl_A", 0 0, v0x1cc9990_0;v0x1cc85e0_0 .alias "cpl_B", 0 0, v0x1cc9ba0_0;v0x1cc8660_0 .alias "dec_A", 0 0, v0x1cc9b10_0;v0x1cc8710_0 .alias "dec_B", 0 0, v0x1cc9cc0_0;v0x1cc8790_0 .alias "inc_A", 0 0, v0x1cc9c20_0;v0x1cc8840_0 .alias "inc_B", 0 0, v0x1cc9df0_0;v0x1cc8940_0 .var "load_inputs", 0 0;v0x1cc89f0_0 .var "load_outputs", 0 0;v0x1cc88c0_0 .alias "mul_AB", 0 0, v0x1cc9e70_0;v0x1cc8b00_0 .var "next_opcode", 3 0;v0x1cc8a70_0 .alias "opcode", 3 0, v0x1cc9480_0;v0x1cc8c20_0 .var "opcode_sel", 65537 0;v0x1cc8b80_0 .alias "or_AB", 0 0, v0x1cca080_0;v0x1cc8d50_0 .alias "reset", 0 0, v0x1cc9fb0_0;v0x1cc8ca0_0 .alias "sl_AB", 0 0, v0x1cca1e0_0;v0x1cc8e90_0 .alias "sr_AB", 0 0, v0x1cca100_0;v0x1cc8dd0_0 .alias "sub_AB", 0 0, v0x1cca350_0;v0x1cc8fe0_0 .var "this_opcode", 3 0;v0x1cc8f10_0 .alias "xor_AB", 0 0, v0x1cca260_0;E_0x1c64dd0 .event edge, v0x1cc8fe0_0;E_0x1c65100/0 .event edge, v0x1cc75f0_0;E_0x1c65100/1 .event posedge, v0x1cbee90_0;E_0x1c65100 .event/or E_0x1c65100/0, E_0x1c65100/1;L_0x1cccaa0 .part v0x1cc8c20_0, 0, 1;L_0x1cccb40 .part v0x1cc8c20_0, 1, 1;L_0x1cccbe0 .part v0x1cc8c20_0, 9, 1;L_0x1cccc80 .part v0x1cc8c20_0, 2, 1;L_0x1cccd20 .part v0x1cc8c20_0, 3, 1;L_0x1cccdc0 .part v0x1cc8c20_0, 4, 1;L_0x1cccee0 .part v0x1cc8c20_0, 5, 1;L_0x1ccd010 .part v0x1cc8c20_0, 6, 1;L_0x1ccd150 .part v0x1cc8c20_0, 7, 1;L_0x1ccd0b0 .part v0x1cc8c20_0, 8, 1;L_0x1ccd2b0 .part v0x1cc8c20_0, 10, 1;L_0x1ccd1f0 .part v0x1cc8c20_0, 11, 1;L_0x1ccd430 .part v0x1cc8c20_0, 12, 1;L_0x1ccd350 .part v0x1cc8c20_0, 13, 1;L_0x1ccd5d0 .part v0x1cc8c20_0, 14, 1;L_0x1ccd4d0 .part v0x1cc8c20_0, 15, 1;S_0x1caa800 .scope module, "datapath" "alu_datapath" 3 85, 5 2, S_0x1cab560;.timescale -9 -12;P_0x1c9fa88 .param/l "ALU_WIDTH" 5 40, +C4<01000>;L_0x1c52560 .functor NOT 8, v0x1ca4970_0, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1ccdd30 .functor AND 1, L_0x1ccdb30, L_0x1ccdc30, C4<1>, C4<1>;L_0x1ccda30 .functor AND 1, L_0x1ccdd30, L_0x1ccdd90, C4<1>, C4<1>;L_0x1cbe250 .functor AND 1, L_0x1ccda30, L_0x1ccde30, C4<1>, C4<1>;L_0x1ccc710 .functor AND 1, L_0x1cccc80, L_0x1ccdfd0, C4<1>, C4<1>;L_0x1ccdbd0 .functor OR 1, L_0x1ccc710, L_0x1ccd4d0, C4<0>, C4<0>;L_0x1cca2e0 .functor NOT 8, v0x1ca52c0_0, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1c657d0 .functor AND 1, L_0x1cce070, L_0x1cccb40, C4<1>, C4<1>;L_0x1ccdcd0 .functor AND 1, L_0x1c657d0, L_0x1cce210, C4<1>, C4<1>;L_0x1c52ce0 .functor OR 1, L_0x1cccc80, L_0x1cccb40, C4<0>, C4<0>;L_0x1c43610 .functor OR 1, L_0x1c52ce0, L_0x1cccbe0, C4<0>, C4<0>;L_0x1cce1b0 .functor OR 1, L_0x1ccd430, L_0x1ccd350, C4<0>, C4<0>;L_0x1ccebe0 .functor AND 1, L_0x1cce940, L_0x1cceae0, C4<1>, C4<1>;L_0x1ccec40 .functor AND 1, L_0x1cce1b0, L_0x1ccebe0, C4<1>, C4<1>;L_0x1cce480 .functor OR 1, L_0x1cccdc0, L_0x1cccee0, C4<0>, C4<0>;L_0x1cceb80 .functor OR 1, L_0x1ccd5d0, L_0x1cccd20, C4<0>, C4<0>;L_0x1cce7f0 .functor AND 1, L_0x1cccaa0, L_0x1ccefd0, C4<1>, C4<1>;L_0x1ccf140 .functor AND 1, L_0x1cce7f0, L_0x1ccf2e0, C4<1>, C4<1>;L_0x1ccd930 .functor AND 1, L_0x1ccf140, L_0x1ccf070, C4<1>, C4<1>;L_0x1cce2b0 .functor AND 1, L_0x1ccd930, L_0x1ccf520, C4<1>, C4<1>;L_0x1ccf7b0 .functor AND 1, L_0x1cce2b0, L_0x1ccf460, C4<1>, C4<1>;L_0x1ccf660 .functor OR 1, L_0x1ccd430, L_0x1ccd350, C4<0>, C4<0>;L_0x1ccf210 .functor OR 1, L_0x1ccf660, L_0x1ccd5d0, C4<0>, C4<0>;L_0x1ccf1a0 .functor OR 1, L_0x1ccf210, L_0x1ccd4d0, C4<0>, C4<0>;L_0x1ccf5c0 .functor OR 1, L_0x1ccf1a0, L_0x1ccd010, C4<0>, C4<0>;L_0x1ccf750 .functor OR 1, L_0x1cccdc0, L_0x1cccee0, C4<0>, C4<0>;L_0x1ccf950 .functor BUFZ 8, v0x1ca4970_0, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1ccf3f0 .functor BUFZ 8, v0x1ca52c0_0, C4<00000000>, C4<00000000>, C4<00000000>;v0x1ca48f0_0 .alias "A", 7 0, v0x1cc9140_0;v0x1ca4970_0 .var "Areg", 7 0;v0x1ca5240_0 .alias "B", 7 0, v0x1cc91f0_0;v0x1ca52c0_0 .var "Breg", 7 0;v0x1c91300_0 .alias "C", 0 0, v0x1ccb610_0;v0x1c91380_0 .var "Creg", 0 0;v0x1c90fe0_0 .alias "V", 0 0, v0x1ccb810_0;v0x1c91060_0 .var "Vreg", 0 0;v0x1cb3580_0 .alias "Y", 7 0, v0x1ccb890_0;v0x1cb3600_0 .var "Yreg", 7 0;v0x1c8a0d0_0 .alias "Z", 0 0, v0x1ccb990_0;v0x1c8a150_0 .var "Zreg", 0 0;v0x1c88220_0 .net *"_s102", 0 0, C4<1>; 1 driversv0x1c882a0_0 .net *"_s104", 0 0, C4<0>; 1 driversv0x1c98fa0_0 .net *"_s108", 0 0, L_0x1cceb80; 1 driversv0x1c8a7f0_0 .net *"_s110", 0 0, C4<0>; 1 driversv0x1c98f20_0 .net *"_s112", 0 0, C4<1>; 1 driversv0x1c9d500_0 .net *"_s116", 0 0, L_0x1ccefd0; 1 driversv0x1c9d580_0 .net *"_s118", 0 0, L_0x1cce7f0; 1 driversv0x1c9d1e0_0 .net *"_s12", 7 0, C4<00000000>; 1 driversv0x1c8a870_0 .net *"_s120", 0 0, L_0x1ccf2e0; 1 driversv0x1c9cec0_0 .net *"_s122", 0 0, L_0x1ccf140; 1 driversv0x1c9cf40_0 .net *"_s124", 0 0, L_0x1ccf070; 1 driversv0x1c9cba0_0 .net *"_s126", 0 0, L_0x1ccd930; 1 driversv0x1c9cc20_0 .net *"_s128", 0 0, L_0x1ccf520; 1 driversv0x1c9d260_0 .net *"_s130", 0 0, L_0x1cce2b0; 1 driversv0x1c9f2c0_0 .net *"_s132", 0 0, L_0x1ccf460; 1 driversv0x1c9f340_0 .net *"_s134", 0 0, L_0x1ccf7b0; 1 driversv0x1c9ef60_0 .net *"_s137", 0 0, L_0x1ccf810; 1 driversv0x1c9efe0_0 .net *"_s138", 0 0, L_0x1ccf660; 1 driversv0x1c9f620_0 .net *"_s14", 7 0, L_0x1c52560; 1 driversv0x1c9e8a0_0 .net *"_s140", 0 0, L_0x1ccf210; 1 driversv0x1c9e920_0 .net *"_s142", 0 0, L_0x1ccf1a0; 1 driversv0x1c9e540_0 .net *"_s144", 0 0, L_0x1ccf5c0; 1 driversv0x1c9e5c0_0 .net *"_s146", 0 0, C4<0>; 1 driversv0x1c9ec00_0 .net *"_s148", 0 0, L_0x1ccf750; 1 driversv0x1c9ec80_0 .net *"_s150", 0 0, L_0x1ccfae0; 1 driversv0x1c9de80_0 .net *"_s152", 0 0, L_0x1ccfd50; 1 driversv0x1c9df00_0 .net *"_s156", 0 0, C4<1>; 1 driversv0x1c9db40_0 .net *"_s158", 0 0, C4<0>; 1 driversv0x1c9dbc0_0 .net *"_s16", 7 0, C4<00000000>; 1 driversv0x1c9d820_0 .net *"_s18", 7 0, C4<11111111>; 1 driversv0x1c9d8c0_0 .net *"_s20", 7 0, L_0x1ccd790; 1 driversv0x1c9c880_0 .net *"_s22", 7 0, L_0x1ccd890; 1 driversv0x1c9c900_0 .net *"_s24", 7 0, L_0x1ccd990; 1 driversv0x1cb2c00_0 .net *"_s28", 0 0, L_0x1ccdb30; 1 driversv0x1cb2c80_0 .net *"_s30", 0 0, L_0x1ccdc30; 1 driversv0x1c5f800_0 .net *"_s32", 0 0, L_0x1ccdd30; 1 driversv0x1c5f880_0 .net *"_s34", 0 0, L_0x1ccdd90; 1 driversv0x1c39a10_0 .net *"_s36", 0 0, L_0x1ccda30; 1 driversv0x1c51680_0 .net *"_s38", 0 0, L_0x1ccde30; 1 driversv0x1cb38c0_0 .net *"_s40", 0 0, L_0x1cbe250; 1 driversv0x1cb3940_0 .net *"_s42", 7 0, C4<11111111>; 1 driversv0x1c427e0_0 .net *"_s44", 7 0, L_0x1ccded0; 1 driversv0x1c65600_0 .net *"_s46", 0 0, L_0x1ccdfd0; 1 driversv0x1cb3380_0 .net *"_s48", 0 0, L_0x1ccc710; 1 driversv0x1cb3400_0 .net *"_s50", 0 0, L_0x1ccdbd0; 1 driversv0x1cc4a10_0 .net *"_s52", 7 0, L_0x1cca2e0; 1 driversv0x1c3ef80_0 .net *"_s54", 0 0, L_0x1cce070; 1 driversv0x1cb3120_0 .net *"_s56", 0 0, L_0x1c657d0; 1 driversv0x1cb31a0_0 .net *"_s58", 0 0, L_0x1cce210; 1 driversv0x1c64800_0 .net *"_s60", 0 0, L_0x1ccdcd0; 1 driversv0x1c64880_0 .net *"_s62", 7 0, C4<00000000>; 1 driversv0x1cb2ec0_0 .net *"_s64", 7 0, C4<00000000>; 1 driversv0x1cb2f40_0 .net *"_s66", 7 0, L_0x1cce340; 1 driversv0x1c9f6a0_0 .net *"_s68", 7 0, L_0x1cce3e0; 1 driversv0x1c9e1e0_0 .net *"_s70", 7 0, L_0x1cce500; 1 driversv0x1c9e280_0 .net *"_s74", 0 0, L_0x1c52ce0; 1 driversv0x1c8a650_0 .net *"_s76", 0 0, L_0x1c43610; 1 driversv0x1c8a6f0_0 .net *"_s78", 0 0, C4<1>; 1 driversv0x1cb2970_0 .net *"_s80", 0 0, C4<0>; 1 driversv0x1cb2a10_0 .net *"_s84", 0 0, L_0x1cce1b0; 1 driversv0x1c90e50_0 .net *"_s86", 0 0, L_0x1cce940; 1 driversv0x1c90ef0_0 .net *"_s88", 0 0, L_0x1cceae0; 1 driversv0x1c8a950_0 .net *"_s90", 0 0, L_0x1ccebe0; 1 driversv0x1c8a9f0_0 .net *"_s92", 0 0, L_0x1ccec40; 1 driversv0x1c5f680_0 .net *"_s95", 7 0, L_0x1cced40; 1 driversv0x1c5f720_0 .net *"_s96", 0 0, L_0x1cce480; 1 driversv0x1c39880_0 .net *"_s98", 7 0, L_0x1ccee90; 1 driversv0x1c39920_0 .alias "add_AB", 0 0, v0x1cc9710_0;v0x1c514e0_0 .net "adderORsel", 0 0, L_0x1ccede0; 1 driversv0x1c51560_0 .net "adderXORsel", 0 0, L_0x1cceca0; 1 driversv0x1c515e0_0 .net "adder_in_a", 7 0, L_0x1ccda90; 1 driversv0x1c42630_0 .net "adder_in_b", 7 0, L_0x1cce5a0; 1 driversv0x1c426b0_0 .net "adder_out", 7 0, v0x1ca4bb0_0; 1 driversv0x1c42730_0 .net "alu_out", 7 0, L_0x1ccef30; 1 driversv0x1c65440_0 .alias "and_AB", 0 0, v0x1cc9790_0;v0x1c654c0_0 .net "carry", 0 0, L_0x1ccf8b0; 1 driversv0x1c65540_0 .net "carry_in", 0 0, L_0x1cce110; 1 driversv0x1cc4840_0 .net "carry_out", 8 0, v0x1c9c590_0; 1 driversv0x1cc48c0_0 .alias "clk", 0 0, v0x1cc9350_0;v0x1cc4940_0 .alias "clr", 0 0, v0x1cc9810_0;v0x1c3eda0_0 .alias "clr_C", 0 0, v0x1cc9890_0;v0x1c3ee20_0 .alias "clr_V", 0 0, v0x1cc9910_0;v0x1c3eea0_0 .alias "clr_Z", 0 0, v0x1cc9a10_0;v0x1c64610_0 .alias "cmp_AB", 0 0, v0x1cc9a90_0;v0x1c64690_0 .alias "cpl_A", 0 0, v0x1cc9990_0;v0x1c64710_0 .alias "cpl_B", 0 0, v0x1cc9ba0_0;v0x1cc73b0_0 .alias "dec_A", 0 0, v0x1cc9b10_0;v0x1cc7450_0 .alias "dec_B", 0 0, v0x1cc9cc0_0;v0x1cc7090_0 .alias "inc_A", 0 0, v0x1cc9c20_0;v0x1cc7130_0 .alias "inc_B", 0 0, v0x1cc9df0_0;v0x1cc71b0_0 .alias "load_inputs", 0 0, v0x1cc9d40_0;v0x1cc7250_0 .alias "load_outputs", 0 0, v0x1cc9f30_0;v0x1cc72d0_0 .net "logic0", 7 0, C4<00000000>; 1 driversv0x1cc7820_0 .net "logic1", 7 0, C4<00000001>; 1 driversv0x1cc74d0_0 .alias "mul_AB", 0 0, v0x1cc9e70_0;v0x1cc7570_0 .alias "or_AB", 0 0, v0x1cca080_0;v0x1cc75f0_0 .alias "reset", 0 0, v0x1cc9fb0_0;v0x1cc7690_0 .net "shifter_carry", 0 0, v0x1cbf130_0; 1 driversv0x1cc7710_0 .net "shifter_direction", 0 0, L_0x1ccff00; 1 driversv0x1cc7790_0 .net "shifter_inA", 7 0, L_0x1ccf950; 1 driversv0x1cc7c30_0 .net "shifter_inB", 7 0, L_0x1ccf3f0; 1 driversv0x1cc7cb0_0 .net "shifter_out", 7 0, v0x1cb3c30_0; 1 driversv0x1cc78a0_0 .alias "sl_AB", 0 0, v0x1cca1e0_0;v0x1cc7920_0 .alias "sr_AB", 0 0, v0x1cca100_0;v0x1cc79a0_0 .alias "sub_AB", 0 0, v0x1cca350_0;v0x1cc7a20_0 .alias "xor_AB", 0 0, v0x1cca260_0;E_0x1c8e490 .event posedge, v0x1cc75f0_0, v0x1cbee90_0;L_0x1ccd790 .functor MUXZ 8, v0x1ca4970_0, C4<11111111>, L_0x1ccd0b0, C4<>;L_0x1ccd890 .functor MUXZ 8, L_0x1ccd790, C4<00000000>, L_0x1cccbe0, C4<>;L_0x1ccd990 .functor MUXZ 8, L_0x1ccd890, L_0x1c52560, L_0x1ccd1f0, C4<>;L_0x1ccda90 .functor MUXZ 8, L_0x1ccd990, C4<00000000>, L_0x1ccd4d0, C4<>;L_0x1ccdb30 .reduce/nor L_0x1cccc80;L_0x1ccdc30 .reduce/nor L_0x1cccb40;L_0x1ccdd90 .reduce/nor L_0x1ccd1f0;L_0x1ccde30 .reduce/nor L_0x1ccd4d0;L_0x1ccded0 .functor MUXZ 8, v0x1ca52c0_0, C4<11111111>, L_0x1ccd150, C4<>;L_0x1ccdfd0 .reduce/nor L_0x1cccb40;L_0x1cce070 .reduce/nor L_0x1cccc80;L_0x1cce210 .reduce/nor L_0x1ccd4d0;L_0x1cce340 .functor MUXZ 8, L_0x1cce5a0, C4<00000000>, L_0x1ccd1f0, C4<>;L_0x1cce3e0 .functor MUXZ 8, L_0x1cce340, C4<00000000>, L_0x1ccdcd0, C4<>;L_0x1cce500 .functor MUXZ 8, L_0x1cce3e0, L_0x1cca2e0, L_0x1ccdbd0, C4<>;L_0x1cce5a0 .functor MUXZ 8, L_0x1cce500, L_0x1ccded0, L_0x1cbe250, C4<>;L_0x1cce110 .functor MUXZ 1, C4<0>, C4<1>, L_0x1c43610, C4<>;L_0x1cce940 .reduce/nor L_0x1cccdc0;L_0x1cceae0 .reduce/nor L_0x1cccee0;L_0x1cced40 .part v0x1c9c590_0, 1, 8;L_0x1ccee90 .functor MUXZ 8, v0x1ca4bb0_0, v0x1cb3c30_0, L_0x1cce480, C4<>;L_0x1ccef30 .functor MUXZ 8, L_0x1ccee90, L_0x1cced40, L_0x1ccec40, C4<>;L_0x1ccede0 .functor MUXZ 1, C4<0>, C4<1>, L_0x1ccd350, C4<>;L_0x1cceca0 .functor MUXZ 1, C4<1>, C4<0>, L_0x1cceb80, C4<>;L_0x1ccefd0 .reduce/nor L_0x1ccd430;L_0x1ccf2e0 .reduce/nor L_0x1ccd350;L_0x1ccf070 .reduce/nor L_0x1ccd5d0;L_0x1ccf520 .reduce/nor L_0x1ccd4d0;L_0x1ccf460 .reduce/nor L_0x1ccd010;L_0x1ccf810 .part v0x1c9c590_0, 8, 1;L_0x1ccfae0 .functor MUXZ 1, L_0x1ccf8b0, v0x1cbf130_0, L_0x1ccf750, C4<>;L_0x1ccfd50 .functor MUXZ 1, L_0x1ccfae0, C4<0>, L_0x1ccf5c0, C4<>;L_0x1ccf8b0 .functor MUXZ 1, L_0x1ccfd50, L_0x1ccf810, L_0x1ccf7b0, C4<>;L_0x1ccff00 .functor MUXZ 1, C4<0>, C4<1>, L_0x1cccee0, C4<>;S_0x1cb1d80 .scope module, "adder" "alu_adder" 5 163, 6 3, S_0x1caa800;.timescale 0 0;P_0x1cb1eb8 .param/l "ADDER_WIDTH" 6 17, +C4<01000>;L_0x1cce9e0 .functor BUFZ 8, L_0x1cd00c0, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1ccfc50 .functor BUFZ 8, L_0x1cd0120, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1ccfcb0 .functor BUFZ 8, L_0x1cd0180, C4<00000000>, C4<00000000>, C4<00000000>;L_0x1cd00c0 .functor XOR 8, L_0x1ccda90, L_0x1cce5a0, C4<00000000>, C4<00000000>;L_0x1cd0180 .functor AND 8, L_0x1ccda90, L_0x1cce5a0, C4<11111111>, C4<11111111>;L_0x1cd0120 .functor OR 8, L_0x1ccda90, L_0x1cce5a0, C4<00000000>, C4<00000000>;v0x1cad830_0 .alias "ORsel", 0 0, v0x1c514e0_0;v0x1cae3a0_0 .alias "XORsel", 0 0, v0x1c51560_0;v0x1cb25c0_0 .net "XandY", 7 0, L_0x1cd0180; 1 driversv0x1c9f980_0 .net "XorY", 7 0, L_0x1cd0120; 1 driversv0x1c9c490_0 .net "XxorY", 7 0, L_0x1cd00c0; 1 driversv0x1cad030_0 .net "and_result", 7 0, L_0x1ccfcb0; 1 driversv0x1cad0b0_0 .alias "carry_in", 0 0, v0x1c65540_0;v0x1c9c590_0 .var "carry_out", 8 0;v0x1c9c610_0 .var "i", 31 0;v0x1ca5010_0 .net "or_result", 7 0, L_0x1ccfc50; 1 driversv0x1ca5090_0 .alias "x", 7 0, v0x1c515e0_0;v0x1ca4de0_0 .net "xor_result", 7 0, L_0x1cce9e0; 1 driversv0x1ca4e60_0 .alias "y", 7 0, v0x1c42630_0;v0x1ca4bb0_0 .var "z", 7 0;E_0x1c8dd60/0 .event edge, v0x1cad830_0, v0x1cae3a0_0, v0x1c9f980_0, v0x1cb25c0_0;E_0x1c8dd60/1 .event edge, v0x1c9c490_0, v0x1c9c590_0, v0x1ca4e60_0, v0x1ca5090_0;E_0x1c8dd60 .event/or E_0x1c8dd60/0, E_0x1c8dd60/1;S_0x1ca6660 .scope module, "shifter" "alu_barrel_shifter" 5 173, 7 2, S_0x1caa800;.timescale -9 -12;P_0x1caa938 .param/l "DWIDTH" 7 10, +C4<01000>;v0x1cbf130_0 .var "c", 0 0;v0x1cbee90_0 .alias "clk", 0 0, v0x1cc9350_0;v0x1cbe2f0_0 .alias "direction", 0 0, v0x1cc7710_0;v0x1c5ffa0_0 .alias "x", 7 0, v0x1cc7790_0;v0x1c3a350_0 .alias "y", 7 0, v0x1cc7c30_0;v0x1c52ab0_0 .var "y_tmp", 7 0;v0x1cb3c30_0 .var "z", 7 0;E_0x1c8f5d0 .event negedge, v0x1cbee90_0;.scope S_0x1cc7aa0;T_3 ;%wait E_0x1c65100;%load/v 8, v0x1cc8d50_0, 1;%jmp/0xz T_3.0, 8;%movi 8, 6, 4;%ix/load 0, 4;%assign/v0 v0x1cc8fe0_0, 0, 8;%jmp T_3.1;T_3.0 ;%load/v 8, v0x1cc8a70_0, 4;%ix/load 0, 4;%assign/v0 v0x1cc8fe0_0, 0, 8;T_3.1 ;%jmp T_3;.thread T_3;.scope S_0x1cc7aa0;T_4 ;%wait E_0x1c64dd0;%ix/load 0, 65538;%assign/v0 v0x1cc8c20_0, 0, 0;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 0;%load/v 8, v0x1cc8fe0_0, 4;%cmpi/u 8, 6, 4;%jmp/1 T_4.0, 6;%cmpi/u 8, 0, 4;%jmp/1 T_4.1, 6;%cmpi/u 8, 1, 4;%jmp/1 T_4.2, 6;%cmpi/u 8, 9, 4;%jmp/1 T_4.3, 6;%cmpi/u 8, 7, 4;%jmp/1 T_4.4, 6;%cmpi/u 8, 8, 4;%jmp/1 T_4.5, 6;%cmpi/u 8, 2, 4;%jmp/1 T_4.6, 6;%cmpi/u 8, 3, 4;%jmp/1 T_4.7, 6;%cmpi/u 8, 12, 4;%jmp/1 T_4.8, 6;%cmpi/u 8, 13, 4;%jmp/1 T_4.9, 6;%cmpi/u 8, 14, 4;%jmp/1 T_4.10, 6;%cmpi/u 8, 10, 4;%jmp/1 T_4.11, 6;%cmpi/u 8, 11, 4;%jmp/1 T_4.12, 6;%cmpi/u 8, 15, 4;%jmp/1 T_4.13, 6;%cmpi/u 8, 4, 4;%jmp/1 T_4.14, 6;%cmpi/u 8, 5, 4;%jmp/1 T_4.15, 6;%load/v 8, v0x1cc8fe0_0, 4;%ix/load 0, 4;%assign/v0 v0x1cc8b00_0, 0, 8;%jmp T_4.17;T_4.0 ;%ix/load 0, 1;%ix/load 1, 6;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%jmp T_4.17;T_4.1 ;%ix/load 0, 1;%ix/load 1, 0;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.2 ;%ix/load 0, 1;%ix/load 1, 1;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.3 ;%ix/load 0, 1;%ix/load 1, 9;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.4 ;%ix/load 0, 1;%ix/load 1, 7;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.5 ;%ix/load 0, 1;%ix/load 1, 8;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.6 ;%ix/load 0, 1;%ix/load 1, 2;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.7 ;%ix/load 0, 1;%ix/load 1, 3;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%jmp T_4.17;T_4.8 ;%ix/load 0, 1;%ix/load 1, 12;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.9 ;%ix/load 0, 1;%ix/load 1, 13;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.10 ;%ix/load 0, 1;%ix/load 1, 14;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.11 ;%ix/load 0, 1;%ix/load 1, 10;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.12 ;%ix/load 0, 1;%ix/load 1, 11;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.13 ;%ix/load 0, 1;%ix/load 1, 15;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.14 ;%ix/load 0, 1;%ix/load 1, 4;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.15 ;%ix/load 0, 1;%ix/load 1, 5;%assign/v0/x1 v0x1cc8c20_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc8940_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1cc89f0_0, 0, 1;%jmp T_4.17;T_4.17 ;%jmp T_4;.thread T_4, $push;.scope S_0x1cb1d80;T_5 ;%wait E_0x1c8dd60;%load/v 8, v0x1cad0b0_0, 1;%ix/load 0, 1;%ix/load 1, 0;%assign/v0/x1 v0x1c9c590_0, 0, 8;%set/v v0x1c9c610_0, 0, 32;T_5.0 ;%load/v 8, v0x1c9c610_0, 32;%cmpi/u 8, 8, 32;%jmp/0xz T_5.1, 5;%ix/getv 1, v0x1c9c610_0;%load/x1p 8, v0x1c9c490_0, 1;; Save base=8 wid=1 in lookaside.%ix/getv 1, v0x1c9c610_0;%load/x1p 9, v0x1c9c590_0, 1;; Save base=9 wid=1 in lookaside.%load/v 10, v0x1cae3a0_0, 1;%and 9, 10, 1;%xor 8, 9, 1;%ix/getv 1, v0x1c9c610_0;%jmp/1 t_0, 4;%ix/load 0, 1;%assign/v0/x1 v0x1ca4bb0_0, 0, 8;t_0 ;%ix/getv 1, v0x1c9c610_0;%load/x1p 8, v0x1cb25c0_0, 1;; Save base=8 wid=1 in lookaside.%ix/getv 1, v0x1c9c610_0;%load/x1p 9, v0x1c9c590_0, 1;; Save base=9 wid=1 in lookaside.%load/v 10, v0x1cad830_0, 1;%or 9, 10, 1;%ix/getv 1, v0x1c9c610_0;%load/x1p 10, v0x1c9f980_0, 1;; Save base=10 wid=1 in lookaside.%and 9, 10, 1;%or 8, 9, 1;%ix/load 0, 1;%load/vp0 9, v0x1c9c610_0, 32;%ix/get 1, 9, 32;%jmp/1 t_1, 4;%ix/load 0, 1;%assign/v0/x1 v0x1c9c590_0, 0, 8;t_1 ;%ix/load 0, 1;%load/vp0 8, v0x1c9c610_0, 32;%set/v v0x1c9c610_0, 8, 32;%jmp T_5.0;T_5.1 ;%jmp T_5;.thread T_5, $push;.scope S_0x1ca6660;T_6 ;%wait E_0x1c8f5d0;%load/v 8, v0x1c5ffa0_0, 8;%set/v v0x1cb3c30_0, 8, 8;%set/v v0x1cbf130_0, 0, 1;%load/v 16, v0x1c3a350_0, 3; Only need 3 of 8 bits; Save base=16 wid=3 in lookaside.%mov 8, 16, 3;%mov 11, 0, 5;%set/v v0x1c52ab0_0, 8, 8;T_6.0 ;%load/v 8, v0x1c52ab0_0, 8;%cmp/u 0, 8, 8;%jmp/0xz T_6.1, 5;%load/v 8, v0x1cbe2f0_0, 1;%jmp/0xz T_6.2, 8;%ix/load 1, 1;%mov 4, 0, 1;%load/x1p 16, v0x1cb3c30_0, 7;; Save base=16 wid=7 in lookaside.%mov 8, 16, 7;%load/v 16, v0x1cb3c30_0, 1; Only need 1 of 8 bits; Save base=16 wid=1 in lookaside.%mov 15, 16, 1;%set/v v0x1cb3c30_0, 8, 8;%load/v 8, v0x1cb3c30_0, 1; Only need 1 of 8 bits; Save base=8 wid=1 in lookaside.%set/v v0x1cbf130_0, 8, 1;%jmp T_6.3;T_6.2 ;%ix/load 1, 7;%mov 4, 0, 1;%load/x1p 16, v0x1cb3c30_0, 1;; Save base=16 wid=1 in lookaside.%mov 8, 16, 1;%load/v 16, v0x1cb3c30_0, 7; Only need 7 of 8 bits; Save base=16 wid=7 in lookaside.%mov 9, 16, 7;%set/v v0x1cb3c30_0, 8, 8;%ix/load 1, 6;%mov 4, 0, 1;%load/x1p 8, v0x1cb3c30_0, 1;; Save base=8 wid=1 in lookaside.%set/v v0x1cbf130_0, 8, 1;T_6.3 ;%load/v 8, v0x1c52ab0_0, 8;%mov 16, 8, 8;%mov 24, 0, 24;%subi 16, 1, 32;%set/v v0x1c52ab0_0, 16, 8;%jmp T_6.0;T_6.1 ;%jmp T_6;.thread T_6;.scope S_0x1caa800;T_7 ;%wait E_0x1c8e490;%load/v 8, v0x1cc75f0_0, 1;%jmp/0xz T_7.0, 8;%ix/load 0, 8;%assign/v0 v0x1ca4970_0, 0, 0;%ix/load 0, 8;%assign/v0 v0x1ca52c0_0, 0, 0;%ix/load 0, 8;%assign/v0 v0x1cb3600_0, 0, 0;%ix/load 0, 1;%assign/v0 v0x1c8a150_0, 0, 1;%ix/load 0, 1;%assign/v0 v0x1c91380_0, 0, 0;%ix/load 0, 1;%assign/v0 v0x1c91060_0, 0, 0;%jmp T_7.1;T_7.0 ;%load/v 8, v0x1cc71b0_0, 1;%jmp/0xz T_7.2, 8;%load/v 8, v0x1ca48f0_0, 8;%ix/load 0, 8;%assign/v0 v0x1ca4970_0, 0, 8;%load/v 8, v0x1ca5240_0, 8;%ix/load 0, 8;%assign/v0 v0x1ca52c0_0, 0, 8;T_7.2 ;%load/v 8, v0x1cc7250_0, 1;%jmp/0xz T_7.4, 8;%load/v 8, v0x1c42730_0, 8;%ix/load 0, 8;%assign/v0 v0x1cb3600_0, 0, 8;T_7.4 ;%load/v 8, v0x1cc4940_0, 1;%jmp/0xz T_7.6, 8;%ix/load 0, 8;%assign/v0 v0x1ca4970_0, 0, 0;%ix/load 0, 8;%assign/v0 v0x1ca52c0_0, 0, 0;%ix/load 0, 8;%assign/v0 v0x1cb3600_0, 0, 0;%ix/load 0, 1;%assign/v0 v0x1c91380_0, 0, 0;T_7.6 ;%load/v 8, v0x1c3eea0_0, 1;%jmp/0xz T_7.8, 8;%ix/load 0, 1;%assign/v0 v0x1c8a150_0, 0, 0;T_7.8 ;%load/v 8, v0x1c3eda0_0, 1;%jmp/0xz T_7.10, 8;%ix/load 0, 1;%assign/v0 v0x1c91380_0, 0, 0;T_7.10 ;%load/v 8, v0x1c3ee20_0, 1;%jmp/0xz T_7.12, 8;%ix/load 0, 1;%assign/v0 v0x1c91060_0, 0, 0;T_7.12 ;%load/v 8, v0x1c42730_0, 8;%cmpi/u 8, 0, 8;%jmp/0xz T_7.14, 4;%ix/load 0, 1;%assign/v0 v0x1c8a150_0, 0, 1;%jmp T_7.15;T_7.14 ;%ix/load 0, 1;%assign/v0 v0x1c8a150_0, 0, 0;T_7.15 ;%load/v 8, v0x1c654c0_0, 1;%ix/load 0, 1;%assign/v0 v0x1c91380_0, 0, 8;T_7.1 ;%jmp T_7;.thread T_7;.scope S_0x1c43f20;T_8 ;%movi 8, 6382692, 32;%ix/load 1, 0;%ix/load 3, 0;%set/av v0x1ccc030, 8, 32;%movi 8, 1768842081, 32;%ix/load 1, 0;%ix/load 3, 1;%set/av v0x1ccc030, 8, 32;%movi 40, 1768842082, 32;%ix/load 1, 0;%ix/load 3, 9;%set/av v0x1ccc030, 40, 32;%movi 72, 7566690, 32;%ix/load 1, 0;%ix/load 3, 2;%set/av v0x1ccc030, 72, 32;%movi 72, 6516080, 32;%ix/load 1, 0;%ix/load 3, 3;%set/av v0x1ccc030, 72, 32;%movi 72, 6386540, 32;%ix/load 1, 0;%ix/load 3, 4;%set/av v0x1ccc030, 72, 32;%movi 72, 6386546, 32;%ix/load 1, 0;%ix/load 3, 5;%set/av v0x1ccc030, 72, 32;%movi 72, 6515826, 32;%ix/load 1, 0;%ix/load 3, 6;%set/av v0x1ccc030, 72, 32;%movi 72, 1684366177, 32;%ix/load 1, 0;%ix/load 3, 7;%set/av v0x1ccc030, 72, 32;%movi 104, 1684366178, 32;%ix/load 1, 0;%ix/load 3, 8;%set/av v0x1ccc030, 104, 32;%movi 136, 7173484, 32;%ix/load 1, 0;%ix/load 3, 10;%set/av v0x1ccc030, 136, 32;%movi 136, 1668312161, 32;%ix/load 1, 0;%ix/load 3, 11;%set/av v0x1ccc030, 136, 32;%movi 168, 6385252, 32;%ix/load 1, 0;%ix/load 3, 12;%set/av v0x1ccc030, 168, 32;%movi 168, 28530, 32;%ix/load 1, 0;%ix/load 3, 13;%set/av v0x1ccc030, 168, 32;%movi 168, 7892850, 32;%ix/load 1, 0;%ix/load 3, 14;%set/av v0x1ccc030, 168, 32;%movi 168, 1668312162, 32;%ix/load 1, 0;%ix/load 3, 15;%set/av v0x1ccc030, 168, 32;%end;.thread T_8;.scope S_0x1c43f20;T_9 ;%movi 8, 10000, 32;%set/v v0x1ccc170_0, 8, 32;%set/v v0x1ccc610_0, 1, 1;%vpi_call 2 127 "$display", "Generating %0d random inputs", v0x1ccc170_0;%end;.thread T_9;.scope S_0x1c43f20;T_10 ;%set/v v0x1ccb690_0, 0, 1;T_10.0 ;%delay 10000000, 0;%load/v 8, v0x1ccb690_0, 1;%inv 8, 1;%set/v v0x1ccb690_0, 8, 1;%jmp T_10.0;%end;.thread T_10;.scope S_0x1c43f20;T_11 ;%wait E_0x1cbe950;%jmp T_11;.thread T_11, $push;.scope S_0x1c43f20;T_12 ;%set/v v0x1ccbd60_0, 0, 32;%end;.thread T_12;.scope S_0x1c43f20;T_13 ;%wait E_0x1cbe000;%load/v 8, v0x1ccbcd0_0, 1;%jmp/0xz T_13.0, 8;%load/v 8, v0x1ccbd60_0, 32;%cmp/s 0, 8, 32;%jmp/0xz T_13.2, 5;%vpi_call 2 174 "$display", "Test FAILED with %d ERRORs [%0t] ", v0x1ccbd60_0, $time;%jmp T_13.3;T_13.2 ;%vpi_call 2 176 "$display", "Test PASSED ";T_13.3 ;%vpi_call 2 179 "$fclose", v0x1ccbe80_0;%vpi_call 2 180 "$fclose", v0x1ccc4b0_0;%vpi_call 2 181 "$finish";T_13.0 ;%jmp T_13;.thread T_13;.scope S_0x1c43f20;T_14 ;%delay 1000, 0;%vpi_func 2 192 "$fopen", 8, 32, "alu_test.txt", "r";%set/v v0x1ccbe80_0, 8, 32;%set/v v0x1ccbcd0_0, 0, 1;%set/v v0x1ccbb30_0, 0, 32;%set/v v0x1ccb710_0, 1, 1;%set/v v0x1ccc800_0, 0, 1;T_14.0 ;%vpi_func 2 203 "$feof", 8, 32, v0x1ccbe80_0;%nor/r 8, 8, 32;%load/v 9, v0x1ccc610_0, 1;%inv 9, 1;%and 8, 9, 1;%load/v 9, v0x1ccc610_0, 1;%load/v 10, v0x1ccc170_0, 32;%cmp/s 0, 10, 32;%mov 10, 5, 1;%and 9, 10, 1;%or 8, 9, 1;%jmp/0xz T_14.1, 8;%load/v 8, v0x1ccbb30_0, 32;%mov 40, 8, 32;%mov 72, 39, 1;%addi 40, 1, 33;%set/v v0x1ccbb30_0, 40, 32;%load/v 8, v0x1ccc610_0, 1;%jmp/0xz T_14.2, 8;%vpi_func 2 216 "$random", 8, 32;%set/v v0x1ccc530_0, 8, 32;%load/v 8, v0x1ccc530_0, 32;%set/v v0x1ccba10_0, 8, 8;%vpi_func 2 223 "$random", 8, 32;%set/v v0x1ccc530_0, 8, 32;%load/v 8, v0x1ccc530_0, 32;%set/v v0x1ccbab0_0, 8, 8;%vpi_func 2 230 "$random", 8, 32;%set/v v0x1ccc530_0, 8, 32;%load/v 8, v0x1ccc530_0, 32;%set/v v0x1ccae50_0, 8, 32;%fork TD_alu_tb.get_random_opcode, S_0x1ccacf0;%join;%load/v 8, v0x1ccadd0_0, 32;%set/v v0x1ccc900_0, 8, 32;%vpi_func 2 237 "$random", 8, 32;%set/v v0x1ccc530_0, 8, 32;%load/v 8, v0x1ccc530_0, 32;%set/v v0x1ccbc50_0, 8, 1;%load/v 8, v0x1ccc170_0, 32;%mov 40, 8, 32;%mov 72, 39, 1;%subi 40, 1, 33;%set/v v0x1ccc170_0, 40, 32;%jmp T_14.3;T_14.2 ;%vpi_func 2 248 "$fscanf", 8, 32, v0x1ccbe80_0, "%b %b %s %b", v0x1ccba10_0, v0x1ccbab0_0, v0x1ccc900_0, v0x1ccbc50_0;%set/v v0x1ccc880_0, 8, 32;T_14.4 ;%load/v 8, v0x1ccc880_0, 32;%cmpi/u 8, 0, 32;%mov 8, 4, 1;%vpi_func 2 249 "$feof", 9, 32, v0x1ccbe80_0;%nor/r 9, 9, 32;%and 8, 9, 1;%jmp/0xz T_14.5, 8;%vpi_func 2 251 "$fgetc", 8, 32, v0x1ccbe80_0;%set/v v0x1ccc880_0, 8, 32;%vpi_func 2 252 "$fscanf", 8, 32, v0x1ccbe80_0, "%b %b %s %b", v0x1ccba10_0, v0x1ccbab0_0, v0x1ccc900_0, v0x1ccbc50_0;%set/v v0x1ccc880_0, 8, 32;%jmp T_14.4;T_14.5 ;T_14.3 ;%load/v 8, v0x1ccbb30_0, 32;%cmpi/u 8, 1, 32;%jmp/0xz T_14.6, 4;%vpi_call 2 257 "$display", "**** Start of Test ****";T_14.6 ;%wait E_0x1c8f5d0;%delay 5000000, 0;%load/v 8, v0x1ccba10_0, 8;%set/v v0x1ccb3d0_0, 8, 8;%load/v 8, v0x1ccbab0_0, 8;%set/v v0x1ccb510_0, 8, 8;%load/v 8, v0x1ccc900_0, 32;%set/v v0x1ccabf0_0, 8, 32;%fork TD_alu_tb.string2opcode, S_0x1ccaa90;%join;%load/v 8, v0x1ccac70_0, 4;%set/v v0x1ccb790_0, 8, 4;%load/v 8, v0x1ccbc50_0, 1;%set/v v0x1ccb710_0, 8, 1;%load/v 8, v0x1ccba10_0, 8;%set/v v0x1cca5b0_0, 8, 8;%load/v 8, v0x1ccbab0_0, 8;%set/v v0x1cca630_0, 8, 8;%load/v 8, v0x1ccc900_0, 32;%set/v v0x1cca6b0_0, 8, 32;%wait E_0x1c90700;%load/v 8, v0x1ccb710_0, 1;%inv 8, 1;%load/v 9, v0x1ccc800_0, 1;%inv 9, 1;%and 8, 9, 1;%jmp/0xz T_14.8, 8;%wait E_0x1c90700;%wait E_0x1c90700;%set/v v0x1ccc800_0, 1, 1;T_14.8 ;%jmp T_14.0;T_14.1 ;%set/v v0x1ccbcd0_0, 1, 1;%end;.thread T_14;.scope S_0x1c43f20;T_15 ;%set/v v0x1ccbbb0_0, 0, 1;%end;.thread T_15;.scope S_0x1c43f20;T_16 ;%wait E_0x1c90700;%delay 5000000, 0;%load/v 8, v0x1cca5b0_0, 8;%ix/load 0, 8;%assign/v0 v0x1cca890_0, 0, 8;%load/v 8, v0x1cca630_0, 8;%ix/load 0, 8;%assign/v0 v0x1cca910_0, 0, 8;%load/v 8, v0x1cca6b0_0, 32;%ix/load 0, 32;%assign/v0 v0x1cca990_0, 0, 8;%load/v 8, v0x1cca730_0, 8;%ix/load 0, 8;%assign/v0 v0x1ccaa10_0, 0, 8;%load/v 8, v0x1ccc800_0, 1;%load/v 9, v0x1ccb710_0, 1;%inv 9, 1;%and 8, 9, 1;%jmp/0xz T_16.0, 8;%load/v 8, v0x1cca890_0, 8;%set/v v0x1ccbf00_0, 8, 8;%load/v 8, v0x1cca910_0, 8;%set/v v0x1ccc0f0_0, 8, 8;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 0;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.2, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%add 8, 16, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.3;T_16.2 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 1;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.4, 8;%load/v 8, v0x1ccbf00_0, 8;%mov 16, 8, 8;%mov 24, 0, 24;%addi 16, 1, 32;%set/v v0x1ccc780_0, 16, 8;%jmp T_16.5;T_16.4 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 9;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.6, 8;%load/v 8, v0x1ccc0f0_0, 8;%mov 16, 8, 8;%mov 24, 0, 24;%addi 16, 1, 32;%set/v v0x1ccc780_0, 16, 8;%jmp T_16.7;T_16.6 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 2;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.8, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%sub 8, 16, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.9;T_16.8 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 3;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.10, 8;%load/v 8, v0x1ccb890_0, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.11;T_16.10 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 4;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.12, 8;%load/v 8, v0x1ccbf00_0, 8;%set/v v0x1ccb030_0, 8, 8;%load/v 8, v0x1ccc0f0_0, 8;%set/v v0x1ccb210_0, 8, 8;%set/v v0x1ccb170_0, 0, 1;%fork TD_alu_tb.bas, S_0x1ccaf50;%join;%load/v 8, v0x1ccb0d0_0, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.13;T_16.12 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 5;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.14, 8;%load/v 8, v0x1ccbf00_0, 8;%set/v v0x1ccb030_0, 8, 8;%load/v 8, v0x1ccc0f0_0, 8;%set/v v0x1ccb210_0, 8, 8;%set/v v0x1ccb170_0, 1, 1;%fork TD_alu_tb.bas, S_0x1ccaf50;%join;%load/v 8, v0x1ccb0d0_0, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.15;T_16.14 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 6;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.16, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%cmp/u 8, 16, 8;%mov 8, 4, 1;%jmp/0 T_16.18, 8;%mov 9, 0, 8;%jmp/1 T_16.20, 8;T_16.18 ; End of true expr.%load/v 17, v0x1ccb890_0, 8;%jmp/0 T_16.19, 8;; End of false expr.%blend 9, 17, 8; Condition unknown.%jmp T_16.20;T_16.19 ;%mov 9, 17, 8; Return false valueT_16.20 ;%set/v v0x1ccc780_0, 9, 8;%jmp T_16.17;T_16.16 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 7;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.21, 8;%load/v 8, v0x1ccbf00_0, 8;%mov 16, 8, 8;%mov 24, 0, 24;%subi 16, 1, 32;%set/v v0x1ccc780_0, 16, 8;%jmp T_16.22;T_16.21 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 8;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.23, 8;%load/v 8, v0x1ccc0f0_0, 8;%mov 16, 8, 8;%mov 24, 0, 24;%subi 16, 1, 32;%set/v v0x1ccc780_0, 16, 8;%jmp T_16.24;T_16.23 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 10;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.25, 8;%load/v 8, v0x1ccb890_0, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.26;T_16.25 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 11;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.27, 8;%load/v 8, v0x1ccbf00_0, 8;%inv 8, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.28;T_16.27 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 12;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.29, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%and 8, 16, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.30;T_16.29 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 13;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.31, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%or 8, 16, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.32;T_16.31 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 14;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.33, 8;%load/v 8, v0x1ccbf00_0, 8;%load/v 16, v0x1ccc0f0_0, 8;%xor 8, 16, 8;%set/v v0x1ccc780_0, 8, 8;%jmp T_16.34;T_16.33 ;%load/v 8, v0x1cca990_0, 32;%ix/load 3, 15;%mov 4, 0, 1;%load/av 40, v0x1ccc030, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%jmp/0xz T_16.35, 8;%load/v 8, v0x1ccc0f0_0, 8;%inv 8, 8;%set/v v0x1ccc780_0, 8, 8;T_16.35 ;T_16.34 ;T_16.32 ;T_16.30 ;T_16.28 ;T_16.26 ;T_16.24 ;T_16.22 ;T_16.17 ;T_16.15 ;T_16.13 ;T_16.11 ;T_16.9 ;T_16.7 ;T_16.5 ;T_16.3 ;%load/v 8, v0x1ccbfb0_0, 32;%movi 40, 6515826, 32;%cmp/u 8, 40, 32;%mov 8, 4, 1;%load/v 9, v0x1ccbde0_0, 1;%or 8, 9, 1;%jmp/0xz T_16.37, 8;%load/v 8, v0x1ccb890_0, 8;%set/v v0x1ccc780_0, 8, 8;T_16.37 ;%load/v 8, v0x1cca990_0, 32;%set/v v0x1ccbfb0_0, 8, 32;%load/v 8, v0x1cca890_0, 8;%set/v v0x1ccb470_0, 8, 8;%load/v 8, v0x1cca910_0, 8;%set/v v0x1ccb590_0, 8, 8;%load/v 8, v0x1ccb890_0, 8;%set/v v0x1ccb910_0, 8, 8;%load/v 8, v0x1ccc780_0, 8;%set/v v0x1ccc690_0, 8, 8;%load/v 8, v0x1ccbbb0_0, 1;%inv 8, 1;%set/v v0x1ccbbb0_0, 8, 1;%load/v 8, v0x1ccb890_0, 8;%load/v 16, v0x1ccc780_0, 8;%cmp/u 8, 16, 8;%inv 4, 1;%mov 8, 4, 1;%load/v 9, v0x1ccc780_0, 8;%and/r 9, 9, 8;%cmp/u 9, 2, 1;%mov 9, 6, 1;%or 8, 9, 1;%load/v 9, v0x1ccc780_0, 8;%or/r 9, 9, 8;%cmp/u 9, 3, 1;%mov 9, 6, 1;%or 8, 9, 1;%load/v 9, v0x1ccb890_0, 8;%and/r 9, 9, 8;%cmp/u 9, 2, 1;%mov 9, 6, 1;%or 8, 9, 1;%load/v 9, v0x1ccb890_0, 8;%or/r 9, 9, 8;%cmp/u 9, 3, 1;%mov 9, 6, 1;%or 8, 9, 1;%jmp/0xz T_16.39, 8;%vpi_call 2 404 "$display", "[%0t ps] A:%h[u%h] S:%s[%b] B:%h[u%h] = Y:%h [u%h] expected %h [u%h] -- ERROR Output Y is wrong", $time, v0x1cca890_0, v0x1ccb470_0, v0x1cca990_0, v0x1ccb790_0, v0x1cca910_0, v0x1ccb590_0, v0x1ccb890_0, v0x1ccb910_0, v0x1ccc780_0, v0x1ccc690_0;%load/v 8, v0x1ccbd60_0, 32;%mov 40, 8, 32;%mov 72, 39, 1;%addi 40, 1, 33;%set/v v0x1ccbd60_0, 40, 32;%jmp T_16.40;T_16.39 ;%vpi_call 2 408 "$display", "[%0t ps] A:%h[u%h] S:%s[%b] B:%h[u%h] = Y:%h [u%h] expected %h [u%h]", $time, v0x1cca890_0, v0x1ccb470_0, v0x1cca990_0, v0x1ccb790_0, v0x1cca910_0, v0x1ccb590_0, v0x1ccb890_0, v0x1ccb910_0, v0x1ccc780_0, v0x1ccc690_0;T_16.40 ;%movi 8, 1, 32;%load/v 40, v0x1ccbd60_0, 32;%cmp/s 8, 40, 32;%jmp/0xz T_16.41, 5;%vpi_call 2 413 "$display", "Maximum error count of %d reached...Terminating simulation", v0x1ccbd60_0;%vpi_call 2 414 "$finish";T_16.41 ;T_16.0 ;%load/v 8, v0x1ccb710_0, 1;%set/v v0x1ccbde0_0, 8, 1;%jmp T_16;.thread T_16;.scope S_0x1c43f20;T_17 ;%vpi_call 2 505 "$dumpfile", "alu_tb.vcd";%vpi_call 2 506 "$dumpvars";%end;.thread T_17;# The file index is used to find the file name in the following table.:file_names 8;"N/A";"<interactive>";"/home/leonous/projects/verilog/ecpu/components/alu/tb/alu_tb.v";"/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu.v";"/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu_controller.v";"/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu_datapath.v";"/home/leonous/projects/verilog/ecpu/components/alu/../adder/alu_adder.v";"/home/leonous/projects/verilog/ecpu/components/alu/../barrel_shifter/simple/barrel_shifter_simple.v";
