URL
https://opencores.org/ocsvn/ecpu_alu/ecpu_alu/trunk
Subversion Repositories ecpu_alu
[/] [ecpu_alu/] [trunk/] [alu/] [systemc/] [obj_dir/] [Valu_tb__verFiles.dat] - Rev 5
Compare with Previous | Blame | View Log
C "-sc -I/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog -I/usr/local/scv/include -I/usr/local/scv/lib-linux -y /home/leonous/projects/verilog/ecpu/components/alu/../adder -v /home/leonous/projects/verilog/ecpu/components/alu/../barrel_shifter/simple/barrel_shifter_simple.temp.v -y /home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog -Wno-COMBDLY -Wno-UNOPTFLAT -Wno-WIDTH -Wno-STMTDLY -DRANDOM=31 ./alu_tb.v --public --exe sc_main.cpp"S 1969 1237940238 "/home/leonous/projects/verilog/ecpu/components/alu/../adder/alu_adder.v"S 1299 1238048039 "/home/leonous/projects/verilog/ecpu/components/alu/../barrel_shifter/simple/barrel_shifter_simple.temp.v"S 4736 1237947677 "/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu.v"S 6745 1238377309 "/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu_controller.v"S 830 1237699868 "/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu_controller.vh"S 8715 1237941480 "/home/leonous/projects/verilog/ecpu/components/alu/rtl/verilog/alu_datapath.v"S 3223715 1238121968 "/usr/local/verilator-3.701/verilator_bin"S 17382 1238409411 "alu_tb.v"T 9814 1238412135 "obj_dir/Valu_tb.cpp"T 2231 1238412135 "obj_dir/Valu_tb.h"T 875 1238412135 "obj_dir/Valu_tb.mk"T 55992 1238412135 "obj_dir/Valu_tb__Inlines.h"T 669 1238412135 "obj_dir/Valu_tb__Syms.cpp"T 827 1238412135 "obj_dir/Valu_tb__Syms.h"T 818 1238412135 "obj_dir/Valu_tb__ver.d"T 0 1238412135 "obj_dir/Valu_tb__verFiles.dat"T 411812 1238412135 "obj_dir/Valu_tb_alu_tb.cpp"T 13773 1238412135 "obj_dir/Valu_tb_alu_tb.h"T 224 1238412135 "obj_dir/Valu_tb_classes.mk"