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[/] [esoc/] [trunk/] [Sources/] [altera/] [esoc_fifo_nkx32/] [esoc_fifo_16kx32_waveforms.html] - Rev 53
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<html> <head> <title>Sample Waveforms for esoc_fifo_16kx32.vhd </title> </head> <body> <h2><CENTER>Sample behavioral waveforms for design file esoc_fifo_16kx32.vhd </CENTER></h2> <P>The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design esoc_fifo_16kx32.vhd. The design esoc_fifo_16kx32.vhd has a depth of 16384 words of 8 bits each. The fifo is in legacy synchronous mode. The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request. </P> <CENTER><img src=esoc_fifo_16kx32_wave0.jpg> </CENTER> <P><CENTER><FONT size=2>Fig. 1 : Wave showing read and write operation. </CENTER></P> <P><FONT size=3>The above waveform shows the behavior of the design under normal read and write conditions with aclr . </P>
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