Subversion Repositories esoc

// Generated by Triple Speed Ethernet 8.1 [Altera, IP Toolbench 1.3.0 Build 163]
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
// ************************************************************
// Copyright (C) 1991-2012 Altera Corporation
// Any megafunction design, and related net list (encrypted or decrypted),
// support information, device programming or simulation file, and any other
// associated documentation or information provided by Altera or a partner
// under Altera's Megafunction Partnership Program may be used only to
// program PLD devices (but not masked PLD devices) from Altera.  Any other
// use of such megafunction design, net list, support information, device
// programming or simulation file, or any other related documentation or
// information is prohibited for any other purpose, including, but not
// limited to modification, reverse engineering, de-compiling, or use with
// any other silicon devices, unless such use is explicitly licensed under
// a separate agreement with Altera or a megafunction partner.  Title to
// the intellectual property, including patents, copyrights, trademarks,
// trade secrets, or maskworks, embodied in any such megafunction design,
// net list, support information, device programming or simulation file, or
// any other related documentation or information provided by Altera or a
// megafunction partner, remains with Altera, the megafunction partner, or
// their respective licensors.  No other licenses, including any licenses
// needed under any third party's intellectual property, are provided herein.
 
module esoc_port_mac (
	ff_tx_crc_fwd,
	ff_tx_data,
	ff_tx_eop,
	ff_tx_err,
	ff_tx_mod,
	ff_tx_sop,
	ff_tx_wren,
	ff_tx_clk,
	ff_rx_rdy,
	ff_rx_clk,
	address,
	read,
	writedata,
	write,
	clk,
	reset,
	rgmii_in,
	rx_control,
	tx_clk,
	rx_clk,
	set_10,
	set_1000,
	xon_gen,
	xoff_gen,
	magic_sleep_n,
	mdio_in,
	ff_tx_rdy,
	ff_rx_data,
	ff_rx_dval,
	ff_rx_eop,
	ff_rx_mod,
	ff_rx_sop,
	rx_err,
	rx_err_stat,
	rx_frm_type,
	ff_rx_dsav,
	readdata,
	waitrequest,
	rgmii_out,
	tx_control,
	ena_10,
	eth_mode,
	ff_tx_septy,
	tx_ff_uflow,
	ff_rx_a_full,
	ff_rx_a_empty,
	ff_tx_a_full,
	ff_tx_a_empty,
	magic_wakeup,
	mdio_out,
	mdio_oen,
	mdc);
 
	input		ff_tx_crc_fwd;
	input	[31:0]	ff_tx_data;
	input		ff_tx_eop;
	input		ff_tx_err;
	input	[1:0]	ff_tx_mod;
	input		ff_tx_sop;
	input		ff_tx_wren;
	input		ff_tx_clk;
	input		ff_rx_rdy;
	input		ff_rx_clk;
	input	[7:0]	address;
	input		read;
	input	[31:0]	writedata;
	input		write;
	input		clk;
	input		reset;
	input	[3:0]	rgmii_in;
	input		rx_control;
	input		tx_clk;
	input		rx_clk;
	input		set_10;
	input		set_1000;
	input		xon_gen;
	input		xoff_gen;
	input		magic_sleep_n;
	input		mdio_in;
	output		ff_tx_rdy;
	output	[31:0]	ff_rx_data;
	output		ff_rx_dval;
	output		ff_rx_eop;
	output	[1:0]	ff_rx_mod;
	output		ff_rx_sop;
	output	[5:0]	rx_err;
	output	[17:0]	rx_err_stat;
	output	[3:0]	rx_frm_type;
	output		ff_rx_dsav;
	output	[31:0]	readdata;
	output		waitrequest;
	output	[3:0]	rgmii_out;
	output		tx_control;
	output		ena_10;
	output		eth_mode;
	output		ff_tx_septy;
	output		tx_ff_uflow;
	output		ff_rx_a_full;
	output		ff_rx_a_empty;
	output		ff_tx_a_full;
	output		ff_tx_a_empty;
	output		magic_wakeup;
	output		mdio_out;
	output		mdio_oen;
	output		mdc;
endmodule