OpenCores
URL https://opencores.org/ocsvn/esoc/esoc/trunk

Subversion Repositories esoc

[/] [esoc/] [trunk/] [Sources/] [altera/] [esoc_rom_nkx32/] [esoc_rom_2kx32.bsf] - Rev 45

Go to most recent revision | Compare with Previous | Blame | View Log

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
        (rect 0 0 216 136)
        (text "esoc_rom_2kx32" (rect 59 1 175 17)(font "Arial" (font_size 10)))
        (text "inst" (rect 8 120 25 132)(font "Arial" ))
        (port
                (pt 0 32)
                (input)
                (text "data[31..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))
                (text "data[31..0]" (rect 4 19 55 32)(font "Arial" (font_size 8)))
                (line (pt 0 32)(pt 88 32)(line_width 3))
        )
        (port
                (pt 0 48)
                (input)
                (text "wren" (rect 0 0 30 14)(font "Arial" (font_size 8)))
                (text "wren" (rect 4 35 26 48)(font "Arial" (font_size 8)))
                (line (pt 0 48)(pt 88 48)(line_width 1))
        )
        (port
                (pt 0 64)
                (input)
                (text "address[10..0]" (rect 0 0 82 14)(font "Arial" (font_size 8)))
                (text "address[10..0]" (rect 4 51 69 64)(font "Arial" (font_size 8)))
                (line (pt 0 64)(pt 88 64)(line_width 3))
        )
        (port
                (pt 0 80)
                (input)
                (text "rden" (rect 0 0 25 14)(font "Arial" (font_size 8)))
                (text "rden" (rect 4 67 25 80)(font "Arial" (font_size 8)))
                (line (pt 0 80)(pt 88 80)(line_width 1))
        )
        (port
                (pt 0 112)
                (input)
                (text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
                (text "clock" (rect 4 99 27 112)(font "Arial" (font_size 8)))
                (line (pt 0 112)(pt 80 112)(line_width 1))
        )
        (port
                (pt 184 136)
                (input)
                (text "aclr" (rect 0 0 14 21)(font "Arial" (font_size 8))(vertical))
                (text "aclr" (rect 170 115 183 132)(font "Arial" (font_size 8))(vertical))
                (line (pt 184 136)(pt 184 96)(line_width 1))
        )
        (port
                (pt 216 32)
                (output)
                (text "q[31..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
                (text "q[31..0]" (rect 177 19 213 32)(font "Arial" (font_size 8)))
                (line (pt 216 32)(pt 136 32)(line_width 3))
        )
        (drawing
                (text "32 bits" (rect 108 46 120 74)(font "Arial" )(vertical))
                (text "2048 words" (rect 121 36 133 83)(font "Arial" )(vertical))
                (text "Block type: AUTO" (rect 41 116 117 128)(font "Arial" ))
                (line (pt 104 24)(pt 136 24)(line_width 1))
                (line (pt 136 24)(pt 136 96)(line_width 1))
                (line (pt 136 96)(pt 104 96)(line_width 1))
                (line (pt 104 96)(pt 104 24)(line_width 1))
                (line (pt 118 58)(pt 123 63)(line_width 1))
                (line (pt 118 62)(pt 123 57)(line_width 1))
                (line (pt 88 27)(pt 96 27)(line_width 1))
                (line (pt 96 27)(pt 96 39)(line_width 1))
                (line (pt 96 39)(pt 88 39)(line_width 1))
                (line (pt 88 39)(pt 88 27)(line_width 1))
                (line (pt 88 34)(pt 90 36)(line_width 1))
                (line (pt 90 36)(pt 88 38)(line_width 1))
                (line (pt 80 36)(pt 88 36)(line_width 1))
                (line (pt 96 32)(pt 104 32)(line_width 3))
                (line (pt 88 43)(pt 96 43)(line_width 1))
                (line (pt 96 43)(pt 96 55)(line_width 1))
                (line (pt 96 55)(pt 88 55)(line_width 1))
                (line (pt 88 55)(pt 88 43)(line_width 1))
                (line (pt 88 50)(pt 90 52)(line_width 1))
                (line (pt 90 52)(pt 88 54)(line_width 1))
                (line (pt 80 52)(pt 88 52)(line_width 1))
                (line (pt 96 48)(pt 104 48)(line_width 1))
                (line (pt 88 59)(pt 96 59)(line_width 1))
                (line (pt 96 59)(pt 96 71)(line_width 1))
                (line (pt 96 71)(pt 88 71)(line_width 1))
                (line (pt 88 71)(pt 88 59)(line_width 1))
                (line (pt 88 66)(pt 90 68)(line_width 1))
                (line (pt 90 68)(pt 88 70)(line_width 1))
                (line (pt 80 68)(pt 88 68)(line_width 1))
                (line (pt 96 64)(pt 104 64)(line_width 3))
                (line (pt 88 75)(pt 96 75)(line_width 1))
                (line (pt 96 75)(pt 96 87)(line_width 1))
                (line (pt 96 87)(pt 88 87)(line_width 1))
                (line (pt 88 87)(pt 88 75)(line_width 1))
                (line (pt 88 82)(pt 90 84)(line_width 1))
                (line (pt 90 84)(pt 88 86)(line_width 1))
                (line (pt 80 84)(pt 88 84)(line_width 1))
                (line (pt 96 80)(pt 104 80)(line_width 1))
                (line (pt 80 112)(pt 80 36)(line_width 1))
        )
)

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.