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https://opencores.org/ocsvn/ethmac/ethmac/trunk
Subversion Repositories ethmac
[/] [ethmac/] [branches/] [unneback/] [sim/] [rtl_sim/] [ncsim_sim/] [bin/] [sim_file_list.lst] - Rev 206
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../../../../bench/verilog/tb_ethernet.v
../../../../bench/verilog/tb_eth_defines.v
../../../../bench/verilog/eth_phy.v
../../../../bench/verilog/eth_phy_defines.v
../../../../bench/verilog/wb_bus_mon.v
../../../../bench/verilog/wb_slave_behavioral.v
../../../../bench/verilog/wb_master32.v
../../../../bench/verilog/wb_master_behavioral.v
../../../../../vs_rams/018/vs_hdsp_256x32.v
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