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https://opencores.org/ocsvn/ethmac/ethmac/trunk
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[/] [ethmac/] [tags/] [rel_21/] [sim/] [rtl_sim/] [modelsim_sim/] [bin/] [vlog.opt] - Rev 338
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+incdir+../../../../bench/verilog
+incdir+../../../../rtl/verilog