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[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [ncsim_sim/] [log/] [eth_tb.log] - Rev 366
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========================== ETHERNET IP Core Testbench results ===========================
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Heading: ACCESS TO MAC REGISTERS TEST
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***************************************************************************************
*************************************************************************************
At time: 68509000
Test: TEST 0: BYTE SELECTS ON 3 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 302749000
Test: TEST 1: 'WALKING ONE' WITH SINGLE CYCLES ACROSS MAC REGISTERS ( VARIOUS BUS DELAYS )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 5383309000
Test: TEST 2: 'WALKING ONE' WITH SINGLE CYCLES ACROSS MAC BUFFER DESC. ( VARIOUS BUS DELAYS )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 5399539000
Test: TEST 3: MAX REG. VALUES AND REG. VALUES AFTER WRITING INVERSE RESET VALUES AND HARD RESET OF THE MAC
reported *SUCCESSFULL*!
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*************************************************************************************
At time: 5645629000
Test: TEST 4: BUFFER DESC. RAM PRESERVING VALUES AFTER HARD RESET OF THE MAC AND RESETING THE LOGIC
reported *SUCCESSFULL*!
*************************************************************************************
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***************************************************************************************
Heading: MIIM MODULE TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 7595117000
Test: TEST 0: CLOCK DIVIDER OF MII MANAGEMENT MODULE WITH ALL POSSIBLE FREQUENCES
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 7622149000
Test: TEST 1: VARIOUS READINGS FROM 'REAL' PHY REGISTERS
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 7655119000
Test: TEST 2: VARIOUS WRITINGS TO 'REAL' PHY REGISTERS ( CONTROL AND NON WRITABLE REGISTERS )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 7673959000
Test: TEST 3: RESET PHY THROUGH MII MANAGEMENT MODULE
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 7749859000
Test: TEST 4: 'WALKING ONE' ACROSS PHY ADDRESS ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 7825759000
Test: TEST 5: 'WALKING ONE' ACROSS PHY'S REGISTER ADDRESS ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 8067259000
Test: TEST 6: 'WALKING ONE' ACROSS PHY'S DATA ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 8071969000
Test: TEST 7: READING FROM PHY WITH WRONG PHY ADDRESS ( HOST READING HIGH 'Z' DATA )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 8081389000
Test: TEST 8: WRITING TO PHY WITH WRONG PHY ADDRESS AND READING FROM CORRECT ONE
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 8976619000
Test: TEST 9: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER READ REQUEST ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 9882439000
Test: TEST 10: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER WRITE REQUEST ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 10098649000
Test: TEST 11: BUSY AND NVALID STATUS DURATIONS DURING WRITE ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 10315609000
Test: TEST 12: BUSY AND NVALID STATUS DURATIONS DURING READ ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 10532569000
Test: TEST 13: BUSY AND NVALID STATUS DURATIONS DURING SCAN ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 10676539000
Test: TEST 14: SCAN STATUS FROM PHY WITH DETECTING LINK-FAIL BIT ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 12186559000
Test: TEST 15: SCAN STATUS FROM PHY WITH SLIDING LINK-FAIL BIT ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 13113619000
Test: TEST 16: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER SCAN REQUEST ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 14603599000
Test: TEST 17: SLIDING STOP SCAN COMMAND AFTER 2. SCAN ( WITH AND WITHOUT PREAMBLE )
reported *SUCCESSFULL*!
*************************************************************************************
NOTE: PHY generates ideal Carrier sense and Collision signals for following tests
***************************************************************************************
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Heading: MAC FULL DUPLEX TRANSMIT TEST
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***************************************************************************************
*************************************************************************************
At time: 15302239000
Test: TEST 0: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 15936679000
Test: TEST 1: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 49727119000
Test: TEST 2: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 53442319000
Test: TEST 3: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 95351355000
Test: TEST 4: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 99968955000
Test: TEST 5: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 104360595000
Test: TEST 6: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 104966115000
Test: TEST 7: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 108053235000
Test: TEST 8: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 108528075000
Test: TEST 9: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 112357635000
Test: TEST 10: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 112755195000
Test: TEST 11: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 113082915000
Test: TEST 12: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 113125035000
Test: TEST 13: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 116433315000
Test: TEST 14: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 116773995000
Test: TEST 15: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 225419715000
Test: TEST 16: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 236329395000
Test: TEST 17: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 238386915000
Test: TEST 18: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 238653435000
Test: TEST 19: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 242447355000
Test: TEST 20: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 242923275000
Test: TEST 21: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC FULL DUPLEX RECEIVE TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 252557359000
Test: TEST 0: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 254085799000
Test: TEST 1: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 294264649000
Test: TEST 2: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 299591329000
Test: TEST 3: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 333243169000
Test: TEST 4: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 336818689000
Test: TEST 5: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 378320475000
Test: TEST 6: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 382758795000
Test: TEST 7: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 386187495000
Test: TEST 8: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 386657745000
Test: TEST 9: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 387208159000
Test: TEST 10: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 387288679000
Test: TEST 11: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 387359689000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387423768000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 387424129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 387487968000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 387488329000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 387492409000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387492529000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 387492529000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 387562849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387562849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 387562867000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 387562969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 387562969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 387633408000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 387633769000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 387637849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387637969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 387637969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 387708409000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387708409000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 387708427000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 387708529000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 387708529000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 387788208000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 387788569000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 387792649000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387792769000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 387792769000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 387872809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387872809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 387872830000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 387872929000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 387872929000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 387952849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 387952849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 387952870000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 387952969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 387952969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 388115689000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 388234969000
Test: TEST 13: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC FULL DUPLEX FLOW CONTROL TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 397626071000
Test: TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 398657171000
Test: TEST 1: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 399868939000
Test: TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 400018579000
Test: TEST 3: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 438761899000
Test: TEST 4: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 443750959000
Test: TEST 5: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC HALF DUPLEX FLOW TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 443899119000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444057159000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444222399000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444387999000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444564339000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444730779000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 444897579000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 445064679000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 445100407000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 445293579000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 445319207000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 445461579000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 445680339000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 445899039000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 445941549000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 445958709000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 445976589000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 445994469000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446019369000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446037369000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446055369000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446073369000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446098269000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446116269000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446134389000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446152629000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446177769000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446196129000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446214489000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446232849000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446257989000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446276349000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446294709000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446313189000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446338689000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446357289000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446376009000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446394549000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446420169000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446439009000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446457849000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446476689000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446502309000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446521149000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446539989000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446558949000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446584929000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446604009000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446623209000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446642229000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446668329000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446687649000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446706969000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446726289000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446752389000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446771709000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446791029000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446810469000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446836929000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446856489000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446876169000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 446880487000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 446895669000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 446906887000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 446922249000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 446947089000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 446966889000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
NOTE: PHY generates 'real delayed' Carrier sense and Collision signals for following tests
***************************************************************************************
***************************************************************************************
Heading: MAC FULL DUPLEX TRANSMIT TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 447667519000
Test: TEST 0: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 448301959000
Test: TEST 1: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 482092399000
Test: TEST 2: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 485807599000
Test: TEST 3: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 527716635000
Test: TEST 4: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 532334235000
Test: TEST 5: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 536725875000
Test: TEST 6: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 537331395000
Test: TEST 7: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 540418515000
Test: TEST 8: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 540893355000
Test: TEST 9: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 544722915000
Test: TEST 10: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 545120475000
Test: TEST 11: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 545448195000
Test: TEST 12: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 545490315000
Test: TEST 13: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 548798595000
Test: TEST 14: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 549139275000
Test: TEST 15: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 657784995000
Test: TEST 16: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 668694675000
Test: TEST 17: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 670752195000
Test: TEST 18: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 671018715000
Test: TEST 19: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 674812635000
Test: TEST 20: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 675288555000
Test: TEST 21: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC FULL DUPLEX RECEIVE TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 684922639000
Test: TEST 0: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 686451079000
Test: TEST 1: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 726629929000
Test: TEST 2: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 731956609000
Test: TEST 3: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 765608449000
Test: TEST 4: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 769183969000
Test: TEST 5: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 810685755000
Test: TEST 6: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 815124075000
Test: TEST 7: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 818552775000
Test: TEST 8: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 819023025000
Test: TEST 9: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 819573439000
Test: TEST 10: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 819653959000
Test: TEST 11: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 819724969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 819789048000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 819789409000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 819853248000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 819853609000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 819857689000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 819857809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 819857809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 819928129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 819928129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 819928147000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 819928249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 819928249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 819998688000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 819999049000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 820003129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820003249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 820003249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 820073689000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820073689000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 820073707000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 820073809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 820073809000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 820153488000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
WB INT signal should not be set
*************************************************************************************
*************************************************************************************
At time: 820153849000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Any of interrupts (except Receive Buffer) was set
*************************************************************************************
*************************************************************************************
At time: 820157929000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820158049000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer Error was not set
*************************************************************************************
*************************************************************************************
At time: 820158049000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer Error) were set
*************************************************************************************
*************************************************************************************
At time: 820238089000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820238089000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 820238110000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 820238209000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 820238209000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 820318129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820318129000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 820318150000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 820318249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Interrupt Receive Buffer was not set
*************************************************************************************
*************************************************************************************
At time: 820318249000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
Other interrupts (except Receive Buffer) were set
*************************************************************************************
*************************************************************************************
At time: 820480969000
Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 820600249000
Test: TEST 13: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC FULL DUPLEX FLOW CONTROL TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 829991351000
Test: TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 831022451000
Test: TEST 1: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 832234219000
Test: TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 832383859000
Test: TEST 3: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 871127179000
Test: TEST 4: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 10Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
*************************************************************************************
At time: 876116239000
Test: TEST 5: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 100Mbps )
reported *SUCCESSFULL*!
*************************************************************************************
***************************************************************************************
***************************************************************************************
Heading: MAC HALF DUPLEX FLOW TEST
***************************************************************************************
***************************************************************************************
*************************************************************************************
At time: 876264399000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 876422439000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 876587679000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 876753279000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 876929619000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 877096059000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 877262859000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 877429959000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 877607619000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 877635687000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 877826379000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 877854487000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 877994859000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 878163519000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 878264599000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Receive packet should be accepted
*************************************************************************************
*************************************************************************************
At time: 878342599000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 878342616000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 878342616000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878342859000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 878342959000
Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )
*FAILED* because
Interrupt Receive Error was not set
*************************************************************************************
*************************************************************************************
At time: 878385939000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878403099000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878420979000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878438859000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878463639000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878481519000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878499399000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878517399000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878542299000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878560299000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878578419000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878596539000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878621559000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878639799000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878658039000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878676399000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878701539000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878719899000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878738259000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878756739000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878782119000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878800599000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878819199000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878837919000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878863419000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878882139000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878900859000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878919699000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878945439000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878964279000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 878983119000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879002079000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879027939000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879046899000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879065979000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879085059000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879111039000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879130239000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879149439000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879168759000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879194859000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879214179000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879233499000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879252939000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879279279000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879298719000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879318279000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879322807000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 879342999000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 879369459000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
TX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879374007000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision
*************************************************************************************
*************************************************************************************
At time: 879389139000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 879408819000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 879420079000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Receive packet should be accepted
*************************************************************************************
*************************************************************************************
At time: 879428239000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong length of the packet out from PHY
*************************************************************************************
*************************************************************************************
At time: 879428256000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the received packet
*************************************************************************************
*************************************************************************************
At time: 879428256000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
RX buffer descriptor status is not correct
*************************************************************************************
*************************************************************************************
At time: 879428499000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Wrong data of the transmitted packet
*************************************************************************************
*************************************************************************************
At time: 879428599000
Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )
*FAILED* because
Interrupt Receive Error was not set
*************************************************************************************
**************************** Ethernet MAC test summary **********************************
Tests performed: 111
Failed tests : 6
Successfull tests: 105
**************************** Ethernet MAC test summary **********************************
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