Subversion Repositories fluid_core_2

//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2014-2015 Azmath Moosa                         ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 3 of the License, or (at your option) any     ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
`timescale 1ns / 1ps
 
module tb_staller;
 
	// Inputs
	reg Clk;
	reg RST;
	reg Stall;
 
	// Outputs
	wire [0:3] stall_lines;
 
	// Instantiate the Unit Under Test (UUT)
	Staller uut (
		.Clk(Clk), 
		.RST(RST), 
		.Stall(Stall), 
		.stall_lines(stall_lines)
	);
 
	initial begin
		// Initialize Inputs
		Clk = 0;
		RST = 1;
		Stall = 0;
 
		// Wait 100 ns for global reset to finish
		#5 RST = 0;
      #65 Stall = 1;
		#5 Stall = 0;
		// Add stimulus here
 
	end
	always begin
		#10 Clk = ~Clk;
	end
 
endmodule