OpenCores
URL https://opencores.org/ocsvn/fluid_core_2/fluid_core_2/trunk

Subversion Repositories fluid_core_2

[/] [fluid_core_2/] [trunk/] [xilinx14.5 project/] [FluidCore.twx] - Rev 4

Compare with Previous | Blame | View Log

<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
                                        twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt  (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
<!ELEMENT twUnconst EMPTY>
<!ELEMENT twUnconstLimit (#PCDATA)>
<!ELEMENT twEnvVar EMPTY>
<!ATTLIST twEnvVar name CDATA #REQUIRED>
<!ATTLIST twEnvVar description CDATA #REQUIRED>
<!ELEMENT twWarn (#PCDATA)>
<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
<!ELEMENT twProc (#PCDATA)>
<!ELEMENT twTemp (#PCDATA)>
<!ELEMENT twVolt (#PCDATA)>
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG |  twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)> 
<!ELEMENT twCycles (twSigConn+)>
<!ATTLIST twCycles twNum CDATA #REQUIRED>
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
<!ELEMENT twSig (#PCDATA)>
<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)> 
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* |  (twPathRpt*, twRacePathRpt?) |  twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET | 
                                                           NETDELAY | 
                                                           NETSKEW | 
                                                           PATH |
                                                           DEFPERIOD |
                                                           UNCONSTPATH |
                                                           DEFPATH | 
                                                           PATH2SETUP |
                                                           UNCONSTPATH2SETUP | 
                                                           PATHCLASS | 
                                                           PATHDELAY | 
                                                           PERIOD |
                                                           FREQUENCY |
                                                           PATHBLOCK |
                                                           OFFSET |
                                                           OFFSETIN |
                                                           OFFSETINCLOCK | 
                                                           UNCONSTOFFSETINCLOCK |
                                                           OFFSETINDELAY |
                                                           OFFSETINMOD |
                                                           OFFSETOUT |
                                                           OFFSETOUTCLOCK |
                                                           UNCONSTOFFSETOUTCLOCK | 
                                                           OFFSETOUTDELAY |
                                                           OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED> 
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
                                           twEndPtCnt?,
                                           twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
<!ATTLIST twConstHead uID CDATA #IMPLIED>
<!ELEMENT twItemCnt (#PCDATA)>
<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest,  (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
                                                twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED  fInputJit CDATA #IMPLIED
                                          fDCMJit CDATA #IMPLIED
                                          fPhaseErr CDATA #IMPLIED
                                          sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit  EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED                      arrv1 CDATA #IMPLIED
                         arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup  EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED                      requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup  actualRollup CDATA #IMPLIED                      errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED                      itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)> 
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED  slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED  units (MHz | ns) "ns" slack CDATA #IMPLIED
                                          best CDATA #IMPLIED requested CDATA #IMPLIED
                                          errors CDATA #IMPLIED
                                          score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)> 
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>       
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED  twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 14.5 Trace  (nt)</twExecVer><twCopyright>Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\14.5\ISE_DS\ISE\bin\nt\unwrapped\trce.exe -intstyle ise -v 3 -s 4 -n
3 -fastpaths -xml FluidCore.twx FluidCore.ncd -o FluidCore.twr FluidCore.pcf

</twCmdLine><twDesign>FluidCore.ncd</twDesign><twDesignPath>FluidCore.ncd</twDesignPath><twPCF>FluidCore.pcf</twPCF><twPcfPath>FluidCore.pcf</twPcfPath><twDevInfo arch="spartan3e" pkg="fg320"><twDevName>xc3s500e</twDevName><twSpeedGrade>-4</twSpeedGrade><twSpeedVer>PRODUCTION 1.27 2013-03-26</twSpeedVer></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twInfo anchorID="6">INFO:Timing:3390 - This architecture does not support a default System Jitter value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock Uncertainty calculation.</twInfo><twInfo anchorID="7">INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and 'Phase Error' calculations, these terms will be zero in the Clock Uncertainty calculation.  Please make appropriate modification to SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase Error.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="8" twNameLen="17"><twSUH2ClkList anchorID="9" twDestWidth="17" twPhaseWidth="18"><twDest>Clk</twDest><twSUH2Clk ><twSrc>Interrupt&lt;0&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">5.379</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-1.465</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>Interrupt&lt;1&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">5.324</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-1.421</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>Interrupt&lt;2&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">5.396</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-1.479</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;1&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.650</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.772</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;2&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.655</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.779</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;3&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.655</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.779</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;4&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.686</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.815</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;5&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.693</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.823</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;6&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.693</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.823</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;7&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.672</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.799</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;8&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.672</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.799</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;9&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.665</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.791</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;10&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.665</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.791</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;11&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.676</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.803</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;12&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.676</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.803</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;13&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.686</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.815</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;14&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.679</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.807</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exInstruction&lt;15&gt;</twSrc><twSUHTime twInternalClk ="Clk_IBUF" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">4.679</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">-0.807</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;0&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.878</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.222</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;1&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.204</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.490</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;2&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.932</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.274</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;3&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.402</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">8.850</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;4&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.524</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">8.945</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;5&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.287</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">8.749</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;6&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.823</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.179</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;7&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.322</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">8.778</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;8&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.970</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.305</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;9&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.218</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.497</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;10&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-5.903</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.250</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;11&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.308</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.574</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;12&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.444</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.683</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;13&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.502</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.733</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;14&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.799</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.970</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;15&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.198</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.493</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;16&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.809</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.982</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;17&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.834</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">10.002</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;18&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-7.108</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">10.224</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;19&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.893</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">10.051</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;20&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.523</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.749</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;21&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.286</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.559</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;22&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.984</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">10.121</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;23&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.672</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.869</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;24&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.406</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.656</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;25&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.920</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">10.066</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;26&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.545</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.764</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;27&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.366</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.620</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;28&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.615</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.818</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;29&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.201</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.481</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;30&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.833</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.992</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;31&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-6.453</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">9.682</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twSUH2ClkList anchorID="10" twDestWidth="12" twPhaseWidth="16"><twDest>Interrupt&lt;3&gt;</twDest><twSUH2Clk ><twSrc>Interrupt&lt;2&gt;</twSrc><twSUHTime twClkPhase="0.000" twInternalClk ="Interrupt_3_IBUF"><twSU2ClkTime twEdge="twFalling" twCrnrFst="f">1.212</twSU2ClkTime><twH2ClkTime twEdge="twFalling" twCrnrFst="f">0.240</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twSUH2ClkList anchorID="11" twDestWidth="16" twPhaseWidth="18"><twDest>RST</twDest><twSUH2Clk ><twSrc>exMemoryData&lt;0&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.686</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.231</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;1&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.012</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.499</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;2&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.740</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.283</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;3&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.210</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">4.859</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;4&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.332</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">4.954</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;5&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.095</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">4.758</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;6&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.631</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.188</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;7&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.130</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">4.787</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;8&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.778</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.314</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;9&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.026</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.506</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;10&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-2.711</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.259</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;11&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.116</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.583</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;12&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.252</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.692</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;13&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.310</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.742</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;14&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.607</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.979</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;15&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.006</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.502</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;16&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.617</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.991</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;17&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.642</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.011</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;18&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.916</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.233</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;19&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.701</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.060</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;20&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.331</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.758</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;21&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.094</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.568</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;22&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.792</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.130</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;23&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.480</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.878</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;24&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.214</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.665</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;25&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.728</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.075</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;26&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.353</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.773</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;27&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.174</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.629</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;28&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.423</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.827</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;29&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.009</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.490</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;30&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.641</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">6.001</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>exMemoryData&lt;31&gt;</twSrc><twSUHTime twInternalClk ="EX_MEM_reg/Clk_RST" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">-3.261</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="f">5.691</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twClk2OutList anchorID="12" twDestWidth="16" twPhaseWidth="18"><twSrc>Clk</twSrc><twClk2Out  twOutPad = "exInstAddr&lt;0&gt;" twMinTime = "5.066" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.154" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exInstAddr&lt;1&gt;" twMinTime = "5.066" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.154" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exInstAddr&lt;2&gt;" twMinTime = "5.081" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.171" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exInstAddr&lt;3&gt;" twMinTime = "5.084" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.175" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exInstAddr&lt;4&gt;" twMinTime = "5.071" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.159" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exInstAddr&lt;5&gt;" twMinTime = "5.078" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.167" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="Clk_IBUF" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;0&gt;" twMinTime = "12.450" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "15.381" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;1&gt;" twMinTime = "12.441" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "15.370" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;2&gt;" twMinTime = "12.441" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "15.370" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;3&gt;" twMinTime = "12.441" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "15.370" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryClk" twMinTime = "17.109" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.643" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;0&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.222" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;1&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.750" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;2&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.487" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;3&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.726" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;4&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.766" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;5&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.762" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;6&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.727" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;7&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "22.037" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;8&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "22.002" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;9&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.815" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;10&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.580" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;11&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.533" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;12&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.502" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;13&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.245" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;14&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.532" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;15&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.520" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;16&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.826" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;17&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.806" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;18&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.107" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;19&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.110" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;20&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.926" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;21&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.122" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;22&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.207" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;23&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.206" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;24&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.400" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;25&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.482" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;26&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.677" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;27&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.762" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;28&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.764" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;29&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.962" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;30&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "21.766" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;31&gt;" twMinTime = "12.419" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "22.237" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryWrite" twMinTime = "16.781" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "20.980" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2OutList anchorID="13" twDestWidth="16" twPhaseWidth="18"><twSrc>RST</twSrc><twClk2Out  twOutPad = "exMemoryAddr&lt;0&gt;" twMinTime = "9.258" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "11.390" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;1&gt;" twMinTime = "9.249" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "11.379" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;2&gt;" twMinTime = "9.249" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "11.379" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryAddr&lt;3&gt;" twMinTime = "9.249" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "11.379" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryClk" twMinTime = "13.917" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.652" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;0&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.231" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;1&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.759" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;2&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.496" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;3&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.735" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;4&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.775" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;5&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.771" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;6&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.736" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;7&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "18.046" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;8&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "18.011" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;9&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.824" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;10&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.589" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;11&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.542" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;12&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.511" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;13&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.254" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;14&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.541" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;15&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.529" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;16&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.835" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;17&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.815" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;18&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.116" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;19&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.119" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;20&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.935" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;21&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.131" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;22&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.216" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;23&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.215" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;24&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.409" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;25&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.491" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;26&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.686" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;27&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.771" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;28&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.773" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;29&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.971" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;30&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "17.775" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryData&lt;31&gt;" twMinTime = "9.227" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "18.246" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out><twClk2Out  twOutPad = "exMemoryWrite" twMinTime = "13.589" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "16.989" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="EX_MEM_reg/Clk_RST" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="14" twDestWidth="12"><twDest>Clk</twDest><twClk2SU><twSrc>Clk</twSrc><twRiseRise>27.183</twRiseRise><twFallRise>10.335</twFallRise></twClk2SU><twClk2SU><twSrc>Interrupt&lt;3&gt;</twSrc><twRiseRise>5.967</twRiseRise><twFallRise>6.776</twFallRise></twClk2SU><twClk2SU><twSrc>RST</twSrc><twRiseRise>27.183</twRiseRise><twFallRise>5.840</twFallRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="15" twDestWidth="3"><twDest>RST</twDest><twClk2SU><twSrc>Clk</twSrc><twRiseRise>6.954</twRiseRise></twClk2SU><twClk2SU><twSrc>RST</twSrc><twRiseRise>6.937</twRiseRise><twFallRise>2.152</twFallRise></twClk2SU></twClk2SUList><twPad2PadList anchorID="16" twSrcWidth="3" twDestWidth="11"><twPad2Pad><twSrc>Clk</twSrc><twDest>exMemoryClk</twDest><twDel>6.810</twDel></twPad2Pad></twPad2PadList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Mon Apr 27 23:05:09 2015 </twTimestamp></twFoot><twClientInfo anchorID="17"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>

Peak Memory Usage: 142 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.