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            Subversion Repositories fpga-cf
[/] [fpga-cf/] [trunk/] [hdl/] [port_icap/] [sim.do] - Rev 2
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quit -simvlog C:/Xilinx/11.1/ISE/verilog/src/glbl.vvcom ../ICAP_VIRTEX4test/proc_common_pkg.vhdvcom ../ICAP_VIRTEX4test/family_support.vhdvcom ../ICAP_VIRTEX4test/muxf_struct_f.vhdvcom ../ICAP_VIRTEX4test/cntr_incr_decr_addn_f.vhdvcom ../ICAP_VIRTEX4test/dynshreg_f.vhdvcom ../ICAP_VIRTEX4test/srl_fifo_rbu_f.vhdvcom ../ICAP_VIRTEX4test/srl_fifo_f.vhdvcom ../ICAP_VIRTEX4test/ICAP_VIRTEX4test.vhdvlog ../PATLPP/shiftr_bram/shiftr_bram.vvlog ./port_icap_buf.vvlog ./port_icap_tb.vvsim -L unisims_ver -L unimacro_ver -voptargs=+acc port_icap_tb glbladd wave -hex /port_icap_tb/*add wave -hex /port_icap_tb/DUT/*run 400ns

