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URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [Altera/] [ip.hwp.cpu/] [nios_ii_sram/] [1.0/] [hdl/] [nios_ii_sram.qip] - Rev 147

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# clk_0
# cpu_0
set_global_assignment -name SDC_FILE [file join $::quartus(qip_path) cpu_0.sdc]
set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) cpu_0.ocp]
# onchip_memory_0
# jtag_uart_0
# sram_0
set_global_assignment -name TCL_FILE C:/Users/lauri/ncit_summer_school/hw/altera_up_avalon_sram/Altera_UP_Avalon_SRAM_hw.tcl
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) sram_0.v]
# timer_0
# hibi_pe_dma_0
#set_global_assignment -name TCL_FILE [file join $::quartus(qip_path) ip/hibi_pe_dma_hw.tcl]

set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) hibi_pe_dma_0.vhd]
# sysid
# null
set_global_assignment -name SOPC_BUILDER_SIGNATURE_ID 002170BA51F1000001380E6B5432 
 

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