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https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk
Subversion Repositories funbase_ip_library
[/] [funbase_ip_library/] [trunk/] [Altera/] [ip.hwp.cpu/] [nios_ii_sram/] [2.0/] [nios_ii_sram.2.0.xml] - Rev 185
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<?xml version="1.0" encoding="UTF-8"?>
<!-- Created by Kactus2 - Open source IP-Xact toolset -->
<!-- http://sourceforge.net/projects/kactus2/ -->
<!-- Date: 03.09.2012 -->
<!-- Time: 13:49:33 -->
<spirit:component xmlns:kactus2="http://funbase.cs.tut.fi/" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>Altera</spirit:vendor>
<spirit:library>ip.hwp.cpu</spirit:library>
<spirit:name>nios_ii_sram</spirit:name>
<spirit:version>2.0</spirit:version>
<spirit:description>Nios2 SRAM subsystem</spirit:description>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk_clk</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>hibi_master</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.busdef" spirit:version="3.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.absdef" spirit:version="3.0"/>
<spirit:master>
<spirit:addressSpaceRef spirit:addressSpaceRef="hibi_addr_space"/>
</spirit:master>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AV</spirit:name>
<spirit:vector>
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<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
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</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>COMM</spirit:name>
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</spirit:logicalPort>
<spirit:physicalPort>
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</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DATA</spirit:name>
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<spirit:right>0</spirit:right>
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</spirit:logicalPort>
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</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WE</spirit:name>
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</spirit:logicalPort>
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</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>rst_n</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
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<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
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<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>reset_reset_n</spirit:name>
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<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>sram_if</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="sram_io.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="sram_io.absDef" spirit:version="1.0"/>
<spirit:master/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_ADDR_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>17</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_ADDR</spirit:name>
<spirit:vector>
<spirit:left>17</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_CE_N_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_CE_N</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_DQ_TO_AND_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_DQ</spirit:name>
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<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_LB_N_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_LB_N</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_OE_N_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_OE_N</spirit:name>
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<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_UB_N_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_UB_N</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>SRAM_WE_N_FROM_SRAM</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>sram_WE_N</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>hibi_slave</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.busdef" spirit:version="3.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.absdef" spirit:version="3.0"/>
<spirit:slave>
<spirit:memoryMapRef spirit:memoryMapRef="hibi_mem_map"/>
</spirit:slave>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AV</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_pe_dma_av_in</spirit:name>
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<spirit:left>0</spirit:left>
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</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>COMM</spirit:name>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_pe_dma_comm_in</spirit:name>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DATA</spirit:name>
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<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_pe_dma_data_in</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
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</spirit:logicalPort>
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<spirit:name>hibi_pe_dma_empty_in</spirit:name>
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</spirit:vector>
</spirit:physicalPort>
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<spirit:portMap>
<spirit:logicalPort>
<spirit:name>FULL</spirit:name>
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</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_pe_dma_full_in</spirit:name>
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<spirit:left>0</spirit:left>
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</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:addressSpaces>
<spirit:addressSpace>
<spirit:name>avalon_addr_space</spirit:name>
<spirit:description>Avalon address space. (local)</spirit:description>
<spirit:range>4G</spirit:range>
<spirit:width>32</spirit:width>
<spirit:segments>
<spirit:segment>
<spirit:name>.bss</spirit:name>
<spirit:addressOffset>0x00800000</spirit:addressOffset>
<spirit:range>512</spirit:range>
</spirit:segment>
<spirit:segment>
<spirit:name>.entry</spirit:name>
<spirit:addressOffset>0x00800400</spirit:addressOffset>
<spirit:range>512</spirit:range>
</spirit:segment>
<spirit:segment>
<spirit:name>.exceptions</spirit:name>
<spirit:addressOffset>0x00800200</spirit:addressOffset>
<spirit:range>512</spirit:range>
</spirit:segment>
<spirit:segment>
<spirit:name>.heap</spirit:name>
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</spirit:segment>
<spirit:segment>
<spirit:name>.rodata</spirit:name>
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</spirit:segment>
<spirit:segment>
<spirit:name>.rwdata</spirit:name>
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</spirit:segment>
<spirit:segment>
<spirit:name>.stack</spirit:name>
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</spirit:segment>
<spirit:segment>
<spirit:name>.text</spirit:name>
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<spirit:range>512</spirit:range>
</spirit:segment>
<spirit:segment>
<spirit:name>Shared_memory</spirit:name>
<spirit:addressOffset>0x1000000</spirit:addressOffset>
<spirit:range>4K</spirit:range>
</spirit:segment>
</spirit:segments>
<spirit:addressUnitBits>8</spirit:addressUnitBits>
<spirit:localMemoryMap>
<spirit:name>avalon_addr_space</spirit:name>
<spirit:addressBlock>
<spirit:name>HIBI_PE_DMA</spirit:name>
<spirit:baseAddress>0x0</spirit:baseAddress>
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<spirit:width>32</spirit:width>
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</spirit:addressBlock>
<spirit:addressBlock>
<spirit:name>JTAG_UART</spirit:name>
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</spirit:addressBlock>
<spirit:addressBlock>
<spirit:name>TIMER</spirit:name>
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<spirit:range>4</spirit:range>
<spirit:width>32</spirit:width>
<spirit:usage>reserved</spirit:usage>
</spirit:addressBlock>
<spirit:addressBlock>
<spirit:name>SRAM</spirit:name>
<spirit:baseAddress>0x00800000</spirit:baseAddress>
<spirit:range>8M</spirit:range>
<spirit:width>32</spirit:width>
<spirit:usage>memory</spirit:usage>
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<spirit:addressBlock>
<spirit:name>SYSID</spirit:name>
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<spirit:range>4</spirit:range>
<spirit:width>32</spirit:width>
<spirit:usage>reserved</spirit:usage>
</spirit:addressBlock>
<spirit:addressBlock>
<spirit:name>ONCHIP_MEM</spirit:name>
<spirit:baseAddress>0x1000000</spirit:baseAddress>
<spirit:range>4K</spirit:range>
<spirit:width>32</spirit:width>
<spirit:usage>memory</spirit:usage>
</spirit:addressBlock>
</spirit:localMemoryMap>
</spirit:addressSpace>
<spirit:addressSpace>
<spirit:name>hibi_addr_space</spirit:name>
<spirit:description>HIBI address space</spirit:description>
<spirit:range>4G</spirit:range>
<spirit:width>32</spirit:width>
<spirit:addressUnitBits>8</spirit:addressUnitBits>
</spirit:addressSpace>
</spirit:addressSpaces>
<spirit:memoryMaps>
<spirit:memoryMap>
<spirit:name>hibi_mem_map</spirit:name>
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<spirit:name>hibi_addr_block</spirit:name>
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<spirit:range>4</spirit:range>
<spirit:width>32</spirit:width>
<spirit:usage>reserved</spirit:usage>
</spirit:addressBlock>
<spirit:addressUnitBits>32</spirit:addressUnitBits>
</spirit:memoryMap>
</spirit:memoryMaps>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>VHDL:Quartus:</spirit:envIdentifier>
<spirit:modelName>nios2_sram</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>sram_ADDR</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>17</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_CE_N</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_DQ</spirit:name>
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<spirit:direction>inout</spirit:direction>
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<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_LB_N</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_OE_N</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_UB_N</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>sram_WE_N</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>clk_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
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</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_av_in</spirit:name>
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<spirit:name>hibi_pe_dma_av_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
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<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_comm_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
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<spirit:name>hibi_pe_dma_comm_out</spirit:name>
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<spirit:direction>out</spirit:direction>
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<spirit:right>0</spirit:right>
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</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_data_in</spirit:name>
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<spirit:direction>in</spirit:direction>
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<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
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<spirit:port>
<spirit:name>hibi_pe_dma_data_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
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<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
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</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_empty_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
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<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_full_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_re_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>hibi_pe_dma_we_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>reset_reset_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:fileSets>
<spirit:fileSet>
<spirit:name>hdlSources</spirit:name>
<spirit:description>Includes all generated nios2 subsystem sourcefiles in Quartus IP file</spirit:description>
<spirit:file>
<spirit:name>hdl/nios2_sram.sopcinfo</spirit:name>
<spirit:userFileType>sopcInfoFile</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
</spirit:file>
<spirit:file>
<spirit:name>hdl/nios2_sram.qsys</spirit:name>
<spirit:userFileType>qsysFile</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
</spirit:file>
<spirit:file>
<spirit:name>hdl/nios2_sram/synthesis/nios2_sram.qip</spirit:name>
<spirit:userFileType>quartusIpFile</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>nios2_sbt_files</spirit:name>
<spirit:file>
<spirit:name>hdl/components.ipx</spirit:name>
<spirit:userFileType>alteraIpxFile</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
</spirit:file>
</spirit:fileSet>
</spirit:fileSets>
<spirit:cpus>
<spirit:cpu>
<spirit:name>nios2_qsys_0</spirit:name>
<spirit:addressSpaceRef spirit:addressSpaceRef="avalon_addr_space"/>
</spirit:cpu>
</spirit:cpus>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
<kactus2:kts_productHier>IP</kactus2:kts_productHier>
<kactus2:kts_implementation>HW</kactus2:kts_implementation>
<kactus2:kts_firmness>Fixed</kactus2:kts_firmness>
</kactus2:kts_attributes>
<kactus2:swViews>
<kactus2:swView>
<spirit:name>ucosii</spirit:name>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="ip.hwp.cpu" spirit:name="nios_ii_sram.swdesigncfg" spirit:version="1.0"/>
<kactus2:SWBuildCommand>
<kactus2:fileType>cSource</kactus2:fileType>
<spirit:command>nios2-elf-gcc</spirit:command>
<spirit:flags></spirit:flags>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</kactus2:SWBuildCommand>
<kactus2:BSPBuildCommand>
<kactus2:fileType>sopcInfoFile</kactus2:fileType>
<spirit:command>nios2-bsp ucosii</spirit:command>
<kactus2:arguments></kactus2:arguments>
<kactus2:cpuName>nios2_qsys_0</kactus2:cpuName>
</kactus2:BSPBuildCommand>
</kactus2:swView>
</kactus2:swViews>
</kactus2:extensions>
</spirit:vendorExtensions>
</spirit:component>