OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.accelerator/] [dctqidct/] [1.0/] [dctqidct.1.0.xml] - Rev 145

Compare with Previous | Blame | View Log

<?xml version="1.0" encoding="UTF-8"?>
<!-- Created by Kactus2 - Open source IP-Xact toolset -->
<!-- http://sourceforge.net/projects/kactus2/ -->
<!-- Date: 04.07.2012 -->
<!-- Time: 12:38:00 -->
<spirit:component xmlns:kactus2="http://funbase.cs.tut.fi/" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
        <spirit:vendor>TUT</spirit:vendor>
        <spirit:library>ip.hwp.accelerator</spirit:library>
        <spirit:name>dctqidct</spirit:name>
        <spirit:version>1.0</spirit:version>
        <spirit:busInterfaces>
                <spirit:busInterface>
                        <spirit:name>clk</spirit:name>
                        <spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
                        <spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
                        <spirit:slave/>
                        <spirit:connectionRequired>false</spirit:connectionRequired>
                        <spirit:portMaps>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>CLK</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>clk</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                        </spirit:portMaps>
                        <spirit:bitsInLau>8</spirit:bitsInLau>
                        <spirit:endianness>little</spirit:endianness>
                </spirit:busInterface>
                <spirit:busInterface>
                        <spirit:name>dct_if</spirit:name>
                        <spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dct.busdef" spirit:version="1.0"/>
                        <spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dct.absDef" spirit:version="1.0"/>
                        <spirit:master/>
                        <spirit:connectionRequired>false</spirit:connectionRequired>
                        <spirit:portMaps>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>CHROMA_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>chroma_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>INTRA_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>intra_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>LOAD_QP_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>loadQP_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>QP_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>4</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>QP_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>4</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>WR_IDCT_FROM_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>wr_idct_out</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>WR_QUANT_FROM_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>wr_quant_out</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>WR_DCT_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>wr_dct_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>DATA_IDCT_FROM_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>8</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>data_idct_out</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>8</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>DATA_QUANT_FROM_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>7</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>data_quant_out</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>7</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>DATA_DCT_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>8</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>data_dct_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>8</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>QUANT_READY4COL_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>quant_ready4column_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>IDCT_READY4COL_TO_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>idct_ready4column_in</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>DCT_READY4COL_FROM_ACC</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>dct_ready4column_out</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                        </spirit:portMaps>
                        <spirit:bitsInLau>8</spirit:bitsInLau>
                        <spirit:endianness>little</spirit:endianness>
                </spirit:busInterface>
                <spirit:busInterface>
                        <spirit:name>rst_n</spirit:name>
                        <spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
                        <spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
                        <spirit:slave/>
                        <spirit:connectionRequired>false</spirit:connectionRequired>
                        <spirit:portMaps>
                                <spirit:portMap>
                                        <spirit:logicalPort>
                                                <spirit:name>RESETn</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:logicalPort>
                                        <spirit:physicalPort>
                                                <spirit:name>rst_n</spirit:name>
                                                <spirit:vector>
                                                        <spirit:left>0</spirit:left>
                                                        <spirit:right>0</spirit:right>
                                                </spirit:vector>
                                        </spirit:physicalPort>
                                </spirit:portMap>
                        </spirit:portMaps>
                        <spirit:bitsInLau>8</spirit:bitsInLau>
                        <spirit:endianness>little</spirit:endianness>
                </spirit:busInterface>
        </spirit:busInterfaces>
        <spirit:model>
                <spirit:views>
                        <spirit:view>
                                <spirit:name>rtl</spirit:name>
                                <spirit:envIdentifier>vhdl:quartus:</spirit:envIdentifier>
                                <spirit:language spirit:strict="false">vhdl</spirit:language>
                                <spirit:modelName>dctQidct_core</spirit:modelName>
                                <spirit:fileSetRef>
                                        <spirit:localName>hdlSources</spirit:localName>
                                </spirit:fileSetRef>
                        </spirit:view>
                </spirit:views>
                <spirit:ports>
                        <spirit:port>
                                <spirit:name>QP_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>4</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>chroma_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>clk</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>data_dct_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>8</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>data_idct_out</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>out</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>8</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>data_quant_out</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>out</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>7</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>dct_ready4column_out</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>out</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>idct_ready4column_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>intra_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>loadQP_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>quant_ready4column_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>rst_n</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>wr_dct_in</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>in</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>wr_idct_out</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>out</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                        <spirit:port>
                                <spirit:name>wr_quant_out</spirit:name>
                                <spirit:wire spirit:allLogicalDirectionsAllowed="false">
                                        <spirit:direction>out</spirit:direction>
                                        <spirit:vector>
                                                <spirit:left>0</spirit:left>
                                                <spirit:right>0</spirit:right>
                                        </spirit:vector>
                                </spirit:wire>
                                <spirit:vendorExtensions/>
                        </spirit:port>
                </spirit:ports>
        </spirit:model>
        <spirit:fileSets>
                <spirit:fileSet>
                        <spirit:name>hdlSources</spirit:name>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Column_to_elements.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/DPRAM.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Elements_to_column.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/FlipFlop.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Mux2to1.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Parallel2Serial.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Serial_adder.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Serial_multiplier.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Serial_multiplier4idct.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/common_da/Serial_subtractor.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/DCT_control.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/DCT_core.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/DCT_core_tester.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/DCT_pkg.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/DCT1D_DA.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/Rom_dct_sub.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dct/Rom_dct_sum.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dctQidct/dctQidct_core.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dctQidct/Fifo.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/dctQidct/IDCT_fifo.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/IDCT_control.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/IDCT_core.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/IDCT_pkg.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/IDCT_post_sum.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/IDCT1D_DA.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/Rom_idct_even.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/idct/Rom_idct_odd.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/quantizer/IQuant.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                        <spirit:file>
                                <spirit:name>hdl/quantizer/Quantizer_pkg.vhd</spirit:name>
                                <spirit:fileType>vhdlSource</spirit:fileType>
                                <spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
                        </spirit:file>
                </spirit:fileSet>
        </spirit:fileSets>
        <spirit:vendorExtensions>
                <kactus2:extensions>
                        <kactus2:kts_attributes>
                                <kactus2:kts_productHier>IP</kactus2:kts_productHier>
                                <kactus2:kts_implementation>HW</kactus2:kts_implementation>
                                <kactus2:kts_firmness>Mutable</kactus2:kts_firmness>
                        </kactus2:kts_attributes>
                </kactus2:extensions>
        </spirit:vendorExtensions>
</spirit:component>

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.