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[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [eth_lan91c111_ctrl/] [1.0/] [doc/] [readme.txt] - Rev 145
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Simple controller for SMSC LAN91C111 Ethernet PHY
(http://www.smsc.com/index.php?pid=44&tid=145). It is used e.g. in
Altera Stratix II FGPA board.
This controller uses the same interface as DM9000A controller (used in
DE2 board) and can be connected to the UDP/IP controller exactly in
the same way.
LAN91C111 was much more complex to configure and use than DM9000A,
thus the area usage may be somewhat larger. I tried to compensate for
extra complexity by simplifying some of the structures.
You can disable either rx or tx if you don't need them. This is recommended
to avoid unneeded interrupts and to reduce area usage in case they are not
needed.
This has been tested for both send and receive operations with
different packet sizes, but simultaneous tx and rx operations may
hang the chip! This is a problem within the chip.
Also, the chip cannot correctly transmit packets smaller than 66 bytes.
The workaround is to pad them but this should be done on MAC level (i.e.,
by the chip) which cannot be done correctly because we cannot override
the packet size field generated by the chip.
Due to the numerous problems and instability, I strongly recommend not
using LAN91C111 if not absolutely necessary.
Antti Alhonen, February 2012