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[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [hibi_udp/] [1.0/] [hibi_udp.1.0.xml] - Rev 183
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<?xml version="1.0" encoding="UTF-8"?>
<!-- Created by Kactus2 - Open source IP-Xact toolset -->
<!-- http://sourceforge.net/projects/kactus2/ -->
<!-- Date: 09.01.2013 -->
<!-- Time: 13:57:58 -->
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<spirit:viewNameRef>structural_vhd</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_chip_sel_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_clk_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_cmd_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_data_inout</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_interrupt_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_read_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_reset_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>eth_write_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
<spirit:port>
<spirit:name>clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef>rtl</spirit:viewNameRef>
<spirit:viewNameRef>structural</spirit:viewNameRef>
<spirit:viewNameRef>structural_vhd</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:fileSets>
<spirit:fileSet>
<spirit:name>structural_vhdlSource</spirit:name>
<spirit:group>sourceFiles</spirit:group>
<spirit:file>
<spirit:name>vhd/hibi_udp.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">true</spirit:isIncludeFile>
<spirit:logicalName spirit:default="false">work</spirit:logicalName>
<spirit:buildCommand>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:buildCommand>
</spirit:file>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource-87</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource-93</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
</spirit:fileSet>
</spirit:fileSets>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
<kactus2:kts_productHier>IP</kactus2:kts_productHier>
<kactus2:kts_implementation>HW</kactus2:kts_implementation>
<kactus2:kts_firmness>Parameterizable</kactus2:kts_firmness>
</kactus2:kts_attributes>
</kactus2:extensions>
</spirit:vendorExtensions>
</spirit:component>