OpenCores
URL https://opencores.org/ocsvn/fwrisc/fwrisc/trunk

Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [ChangeLog] - Rev 2

Compare with Previous | Blame | View Log

2018-10-11 Simon Davidmann <simond@imperas.com>
    * Ported github riscv/riscv-tests for RV32 processors to this compliance env
    * rv32ua rv32uc rv32ud rv32uf rv32ud rv32ui

2018-09-10  Lee Moore  <moore@imperas.com>
        * Added tests to RV32I to improve coverage, usage of Imperas Mutating Fault Simulator to 
          identify untested usage cases
        * Macro renames to support GPR, (S)FPR, (D)FPR
        * Added test suite RV32IM to test 32 bit Multiply and Divide instructions 
        * Added test suite RV32IMC to test 32 bit Compressed instructions
        * Added test suite RV64I to test 64 bit Integer instructions
        * Added test suite RV64IM to test 64 bit Multiply and Divide instructions 
        
        
2018-06-15  Radek Hajek  <hajek@codasip.com>

        Modifications to support Codasip simulator.

        The simulator is renamed as Codasip-simulator (was
        Codasip-IA-simulator), compliance_test.h has been moved to target
        directories and a COMPILE_TARGET has been added to Makefile to
        allow use of LLVM.

        * Makefile: Include Codasip simulator target.
        * riscv-target/codasip-IA-simulator/compliance_io.h: Renamed as
        riscv-target/Codasip-simulator/compliance_io.h.
        * riscv-target/Codasip-simulator/compliance_io.h: Renamed from
        riscv-target/codasip-IA-simulator/compliance_io.
        * riscv-target/Codasip-simulator/compliance_test.h: Created.
        * riscv-target/codasip-IA-simulator/device/rv32i/Makefile.include:
        Renamed as
        riscv-target/Codasip-simulator/device/rv32i/Makefile.include
        * riscv-target/Codasip-simulator/device/rv32i/Makefile.include:
        Renamed from
        riscv-target/codasip-IA-simulator/device/rv32i/Makefile.include.
        * riscv-test-env/compliance_test.h: Renamed as
        riscv-target/riscvOVPsim/compliance_test.h.
        * riscv-target/riscvOVPsim/compliance_test.h: Renamed from
        riscv-test-env/compliance_test.h.
        * riscv-target/riscvOVPsim/device/rv32i/Makefile.include: Updated
        for new environment.
        * riscv-target/spike/compliance_test.h: Created.
        * riscv-target/spike/device/rv32i/Makefile.include: Updated for
        new environment.
        * riscv-test-suite/rv32i/Makefile: Likewise.

2018-06-10  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        Put placeholders in empty directories to make sure they show in
        the GitHub hierarchy.

        * riscv-test-suite/rv32i/.gitignore: Created.
        * riscv-test-suite/rv32m/.gitignore: Created.

2018-06-10  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * README.md: Make references to files in the repo into links.

2018-06-09  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * .gitignore: Ignore editor backup files.

2018-06-09  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * README.md: Add better link to documentation README.md.

2018-06-08  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * README.md: Move AsciiDoc details into new README.md in the doc
        directory.

2018-06-08  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * README.md: Fix typo in link to AsciiDoc cheat sheet

2018-06-08  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * COPYING.BSD: Created.
        * COPYING.CC: Created.
        * README.md: Add git process, licensing and engineering process.

2018-06-08  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        * README.md: Correct details for running the compliance tests and
        directory for OVPsim.

2018-06-08  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        Clean restructuring to just the work of interest.

        * thought-experiments: Directory removed.
        * .gitignore: Merged with TestStructure/.gitignore
        * Makefile: Renamed from TestStructure/Makefile.
        * TestStructure/Makefile: Renamed as Makefile.
        * README.md: Merged with TestStructure/README.md.
        * TestStructure/.gitignore: Deleted and contents moved into
        .gitignore.
        * TestStructure/README.md: Deleted and contents moved into
        README.md.
        * TestStructure/doc: Directory deleted.
        * TestStructure/riscv-target: Directory moved to riscv-target.
        * riscv-target: Directory moved from TestStructure/riscv-target
        * TestStructure/riscv-test-env: Directory moved to riscv-test-env.
        * riscv-test-env: Directory moved from
        TestStructure/riscv-test-env.
        * TestStructure/riscv-test-suite: Directory moved to
        riscv-test-suite.
        * riscv-test-suite: Directory moved from
        TestStructure/riscv-test-suite.
        * thought-experiments: Directory deleted.

2018-05-21  Jeremy Bennett  <jeremy.bennett@embecosm.com>

        Initial commit to populate the repository.

        * ChangeLog: Created.
        * README.md: Created.

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.