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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32ua/] [rv64ua/] [amoand_d.S] - Rev 2

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# See LICENSE for license details.

#*****************************************************************************
# amoand_d.S
#-----------------------------------------------------------------------------
#
# Test amoand.d instruction.
#

#include "riscv_test.h"
#include "test_macros.h"

RVTEST_RV64U
RVTEST_CODE_BEGIN

  TEST_CASE(2, a4, 0xffffffff80000000, \
    li a0, 0xffffffff80000000; \
    li a1, 0xfffffffffffff800; \
    la a3, amo_operand; \
    sd a0, 0(a3); \
    amoand.d    a4, a1, 0(a3); \
  )

  TEST_CASE(3, a5, 0xffffffff80000000, ld a5, 0(a3))

  # try again after a cache miss
  TEST_CASE(4, a4, 0xffffffff80000000, \
    li  a1, 0x0000000080000000; \
    amoand.d a4, a1, 0(a3); \
  )

  TEST_CASE(5, a5, 0x0000000080000000, ld a5, 0(a3))

  TEST_PASSFAIL

RVTEST_CODE_END

  .data
RVTEST_DATA_BEGIN

  TEST_DATA

RVTEST_DATA_END

  .bss
  .align 3
amo_operand:
  .dword 0

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