Subversion Repositories gecko3

<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">

  <header>
    <!-- ISE source project file created by Project Navigator.             -->
    <!--                                                                   -->
    <!-- This file contains project source information including a list of -->
    <!-- project source files, project and process properties.  This file, -->
    <!-- along with the project source files, is sufficient to open and    -->
    <!-- implement in ISE Project Navigator.                               -->
    <!--                                                                   -->
    <!-- Copyright (c) 1995-2009 Xilinx, Inc.  All rights reserved. -->
  </header>

  <version xil_pn:ise_version="11.1" xil_pn:schema_version="2"/>

  <files>
    <file xil_pn:name="USB_TMC_cmp.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="USB_TMC_IP_loopback.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="gpif_com.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="USB_TMC_IP.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="USB_TMC_IP_Defs.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="USB_TMC_IP_tb.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="PostRouteSimulation"/>
      <association xil_pn:name="PostMapSimulation"/>
      <association xil_pn:name="PostTranslateSimulation"/>
    </file>
    <file xil_pn:name="fifo_X2U_2C_1024B.xco" xil_pn:type="FILE_COREGEN">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="fifo_U2X_2C_1024B.xco" xil_pn:type="FILE_COREGEN">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="USB_TMC_IP.ucf" xil_pn:type="FILE_UCF">
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="fifo_X2U_2C_1024B.ise" xil_pn:type="FILE_COREGENISE">
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="fifo_U2X_2C_1024B.ise" xil_pn:type="FILE_COREGENISE">
      <association xil_pn:name="Implementation"/>
    </file>
  </files>

  <properties>
    <property xil_pn:name="Auto Implementation Top" xil_pn:value="false"/>
    <property xil_pn:name="Compiled Library Directory" xil_pn:value="lib"/>
    <property xil_pn:name="Constraints Entry" xil_pn:value="Constraints Editor"/>
    <property xil_pn:name="Device" xil_pn:value="xc3s4000"/>
    <property xil_pn:name="Device Family" xil_pn:value="Spartan3"/>
    <property xil_pn:name="Fitter Report Format" xil_pn:value="HTML"/>
    <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|USB_TMC_IP|top_core"/>
    <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/USB_TMC_IP"/>
    <property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="true"/>
    <property xil_pn:name="PROP_DesignName" xil_pn:value="usb_tmc_com"/>
    <property xil_pn:name="PROP_mapSmartGuideFileName" xil_pn:value=""/>
    <property xil_pn:name="PROP_parSmartGuideFileName" xil_pn:value=""/>
    <property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="For Inputs and Outputs"/>
    <property xil_pn:name="Package" xil_pn:value="fg676"/>
    <property xil_pn:name="Preferred Language" xil_pn:value="VHDL"/>
    <property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="false"/>
    <property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="false"/>
    <property xil_pn:name="Report Type" xil_pn:value="Error Report"/>
    <property xil_pn:name="Report Type Post Trace" xil_pn:value="Error Report"/>
    <property xil_pn:name="Simulation Resolution" xil_pn:value="1 ns"/>
    <property xil_pn:name="Simulation Run Time Modelsim" xil_pn:value="2000ns"/>
    <property xil_pn:name="Simulator" xil_pn:value="Modelsim-SE VHDL"/>
    <property xil_pn:name="Simulator Path" xil_pn:value="/opt/mentorGraphics/modeltech/bin/"/>
    <property xil_pn:name="Speed Grade" xil_pn:value="-4"/>
    <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)"/>
    <property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL"/>
    <property xil_pn:name="Verbose Property Persistence" xil_pn:value="false"/>
    <property xil_pn:name="iMPACT Project File" xil_pn:value=""/>
  </properties>

  <bindings>
    <binding xil_pn:location="/USB_TMC_IP" xil_pn:name="USB_TMC_IP.ucf"/>
  </bindings>

  <libraries/>

  <partitions>
    <partition xil_pn:name="/USB_TMC_IP"/>
  </partitions>

</project>