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URL https://opencores.org/ocsvn/gecko4/gecko4/trunk

Subversion Repositories gecko4

[/] [gecko4/] [trunk/] [GECKO4com/] [spartan200_an/] [config/] [project.ucf] - Rev 5

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NET "CLOCK_25MHZ" LOC = "A9" ; 
NET "CLOCK_25MHZ" TNM_NET = "CLOCK_25MHZ";
TIMESPEC "TS_CLOCK_25MHZ" = PERIOD "CLOCK_25MHZ" 25 MHz HIGH 50 %;

NET "CLOCK_16MHZ" LOC = "P9" ;
NET "CLOCK_16MHZ" TNM_NET = "CLOCK_16MHZ";
TIMESPEC "TS_CLOCK_16MHZ" = PERIOD "CLOCK_16MHZ" 16 MHz HIGH 50 %;

NET "USER_CLOCK_1_IN" LOC = "H3" | IOSTANDARD = LVTTL | PULLUP ;
NET "USER_CLOCK_1_IN" TNM_NET = "USER_CLOCK_1_IN";
TIMESPEC "TS_USER_CLOCK_1_IN" = PERIOD "USER_CLOCK_1_IN" 100 MHz HIGH 50 %;

NET "USER_CLOCK_2_IN" LOC = "J3"  | IOSTANDARD = LVTTL | PULLUP ;
NET "USER_CLOCK_2_IN" TNM_NET = "USER_CLOCK_2_IN";
TIMESPEC "TS_USER_CLOCK_2_IN" = PERIOD "USER_CLOCK_2_IN" 100 MHz HIGH 50 %;

NET "user_clock_1_fb" FEEDBACK = 10 ps NET "user_clock_1_out" ;
NET "user_clock_2_fb" FEEDBACK = 10 ps NET "user_clock_2_out" ;

NET "user_clock_2_out" LOC = "B15" | IOSTANDARD = LVCMOS25 ; #CLK2
NET "user_clock_2_fb" LOC = "T8" | IOSTANDARD = LVCMOS25 ;
NET "user_clock_2_lock" LOC = "E7" | IOSTANDARD = LVCMOS25 ; #FPGA_C1
NET "user_clock_1_out" LOC = "B14" | IOSTANDARD = LVCMOS25 ; #CLK1
NET "user_clock_1_fb" LOC = "D9" | IOSTANDARD = LVCMOS25 ;
NET "user_clock_1_lock" LOC = "A6" | IOSTANDARD = LVCMOS25 ; #FPGA_C0

NET "clock_25MHz_out" LOC = "A14" | IOSTANDARD = LVCMOS25 ; #CLK2
NET "clock_48MHz_out" LOC = "A13" | IOSTANDARD = LVCMOS25 ; #CLK3

INST "clockgen/clk48_ff" IOB = TRUE ;

PIN "clockgen/buf5.O" TNM = "TS_VGA" ;
PIN "clockgen/buf3.O" TNM = "TS_MAIN" ;
TIMESPEC "TS_FP1" = FROM "TS_MAIN" TO "TS_VGA" TIG ;
TIMESPEC "TS_FP2" = FROM "TS_VGA" TO "TS_MAIN" TIG ;

NET "button1" LOC = "K5" | PULLUP | IOSTANDARD = LVTTL ;
NET "button2" LOC = "K6" | PULLUP | IOSTANDARD = LVTTL ;
NET "button3" LOC = "L6" | PULLUP | IOSTANDARD = LVTTL ;

NET "n_usb_power" LOC = "H10" | IOSTANDARD = LVTTL | PULLUP ;
NET "n_bus_power" LOC = "J11" | IOSTANDARD = LVTTL | PULLUP ;
NET "n_usb_charge" LOC = "J10" | IOSTANDARD = LVTTL | PULLUP ;

NET "n_reset_system" LOC = "H5" | IOSTANDARD = LVTTL | DRIVE = 2;
NET "user_n_reset" LOC = "C4" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;

NET "RxD_in" LOC = "L5" | IOSTANDARD = LVTTL ;
NET "TxD_out" LOC = "N3" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "RxD_out" LOC = "C5" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "TxD_in" LOC = "A5" | IOSTANDARD = LVCMOS25 ;

NET "scpi_disabled" LOC = "C6" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "ESB_bit" LOC = "B6" | IOSTANDARD = LVCMOS25 ;
NET "STATUS3_bit" LOC = "D7" | IOSTANDARD = LVCMOS25 ;

NET "fx2_n_int0" LOC = "G1" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "fx2_pa1" LOC = "H1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_pa3" LOC = "J2" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_flaga" LOC = "G6" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_flagb" LOC = "F4" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<0>" LOC = "P2" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<1>" LOC = "P1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<2>" LOC = "N2" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<3>" LOC = "N1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<4>" LOC = "D1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<5>" LOC = "E1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<6>" LOC = "E2" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data<7>" LOC = "F1" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_fifo_addr<0>" LOC = "K1" | IOSTANDARD = LVTTL ;
NET "fx2_fifo_addr<1>" LOC = "L1" | IOSTANDARD = LVTTL ;
NET "fx2_ifclock" LOC = "K3" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "fx2_n_oe" LOC = "J1"  | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "fx2_n_re" LOC = "L4"  | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "fx2_n_we" LOC = "M3"  | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "fx2_n_pkt_end" LOC = "H6"  | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
INST "fx2/IFCLK_FF" IOB = TRUE ;
INST "fx2/EP8_flag_FF" IOB = TRUE ;
INST "fx2/EP6_flag_FF" IOB = TRUE ;
INST "fx2/EP_n_PKTEND_FF" IOB = TRUE ;
INST "fx2/make_addr_ff.0.one_ff" IOB = TRUE ;
INST "fx2/make_addr_ff.1.one_ff" IOB = TRUE ;
INST "fx2/n_oe_ff" IOB = TRUE ;
INST "fx2/n_re_ff" IOB = TRUE ;
INST "fx2/EP_n_WE_FF" IOB = TRUE ;
INST "fx2/make_data_in_ff.0.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.1.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.2.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.3.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.4.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.5.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.6.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.7.one_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.0.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.1.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.2.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.3.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.4.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.5.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.6.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.7.out_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.0.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.1.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.2.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.3.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.4.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.5.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.6.tri_ff" IOB = TRUE ;
INST "fx2/make_data_in_ff.7.tri_ff" IOB = TRUE ;


NET "fx2_data_nibble<0>" LOC = "E3" | IOSTANDARD = LVTTL ;
NET "fx2_data_nibble<1>" LOC = "F3" | IOSTANDARD = LVTTL ;
NET "fx2_data_nibble<2>" LOC = "G3" | IOSTANDARD = LVTTL ;
NET "fx2_data_nibble<3>" LOC = "H4" | IOSTANDARD = LVTTL ;
NET "fx2_data_select<0>" LOC = "J4" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data_select<1>" LOC = "L2" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data_select<2>" LOC = "K4" | IOSTANDARD = LVTTL | PULLUP ;
NET "fx2_data_select<3>" LOC = "L3" | IOSTANDARD = LVTTL | PULLUP ;
INST "fx2/gen_data_nibble.0.in_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.0.out_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.1.in_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.1.out_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.2.in_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.2.out_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.3.in_ff" IOB = TRUE;
INST "fx2/gen_data_nibble.3.out_ff" IOB = TRUE;

#NET "fx2_flagc" LOC = "E4" | IOSTANDARD = LVTTL | PULLUP ;


NET "RED" LOC = "G4" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "BLUE" LOC = "C1" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "GREEN" LOC = "D3" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "HSYNC" LOC = "C2" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
NET "VSYNC" LOC = "D4" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
INST "vga/hsync_ff" IOB = TRUE;
INST "vga/vsync_ff" IOB = TRUE;
INST "vga/red_ff" IOB = TRUE;
INST "vga/green_ff" IOB = TRUE;
INST "vga/blue_ff" IOB = TRUE;

NET "JTAG_nDET" LOC = "G5" | IOSTANDARD = LVTTL ;

NET "fx2_clk" LOC = "M4" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST ;
INST "usb_dff_2" IOB = TRUE;

NET "sda" LOC = "R1" | PULLUP | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = FAST;
NET "scl" LOC = "J7" | PULLUP | IOSTANDARD = LVTTL ;
INST "sda_oe_ff" IOB = TRUE;

NET "data_request_irq" LOC = "N12" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "data_available_irq" LOC = "C8" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "error_irq" LOC = "E10" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_reset" LOC = "L10" | PULLUP | IOSTANDARD = LVCMOS25 ;
NET "bus_n_start_transmission" LOC = "L9" | PULLUP | IOSTANDARD = LVCMOS25 ;
NET "bus_n_end_transmission" LOC = "A7" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_n_data_valid<0>" LOC = "F8" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_n_data_valid<1>" LOC = "A8" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<0>"  LOC = "P7" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<1>"  LOC = "N8" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<2>"  LOC = "M10" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<3>"  LOC = "N10" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<4>"  LOC = "P11" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<5>"  LOC = "N11" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<6>"  LOC = "C13" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<7>"  LOC = "D13" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<8>"  LOC = "C12" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<9>"  LOC = "C11" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<10>" LOC = "D11" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<11>" LOC = "P8" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<12>" LOC = "B3" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<13>" LOC = "A3" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<14>" LOC = "B4" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_data_addr_cntrl<15>" LOC = "A4" | PULLUP | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_n_start_send" LOC = "R5" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "bus_n_error" LOC = "B8" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
INST "the_bus/n_send_ff" IOB = TRUE ;
INST "the_bus/n_error_ff" IOB = TRUE ;
INST "the_bus/start_trans_ff" IOB = TRUE ;
INST "the_bus/end_tri_ff" IOB = TRUE ;
INST "the_bus/end_out_ff" IOB = TRUE ;
INST "the_bus/end_in_ff" IOB = TRUE ;
INST "the_bus/reset_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.0.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.0.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.0.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.1.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.1.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.1.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.2.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.2.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.2.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.3.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.3.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.3.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.4.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.4.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.4.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.5.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.5.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.5.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.6.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.6.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.6.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.7.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.7.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.7.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.8.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.8.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.8.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.9.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.9.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.9.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.10.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.10.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.10.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.11.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.11.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.11.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.12.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.12.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.12.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.13.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.13.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.13.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.14.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.14.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.14.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.15.din_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.15.dout_ff" IOB = TRUE ;
INST "the_bus/make_data_ffs.15.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.0.in_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.0.out_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.0.tri_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.1.in_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.1.out_ff" IOB = TRUE ;
INST "the_bus/make_data_valid_ffs.1.tri_ff" IOB = TRUE ;


NET "n_hex_switch<0>" LOC = "F12" | PULLUP | IOSTANDARD = LVTTL ;
NET "n_hex_switch<1>" LOC = "G12" | PULLUP | IOSTANDARD = LVTTL ;
NET "n_hex_switch<2>" LOC = "F11" | PULLUP | IOSTANDARD = LVTTL ;
NET "n_hex_switch<3>" LOC = "G11" | PULLUP | IOSTANDARD = LVTTL ;

NET "LEDS_A<0>" LOC="R3" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<0>" LOC="T2" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<1>" LOC="T6" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<1>" LOC="T5" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<2>" LOC="T7" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<2>" LOC="R7" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<3>" LOC="T9" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<3>" LOC="R9" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<4>" LOC="T11" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<4>" LOC="T10" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<5>" LOC="T12" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<5>" LOC="R11" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<6>" LOC="R13" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<6>" LOC="T13" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_A<7>" LOC="R14" | IOSTANDARD = LVCMOS25 | DRIVE = 2;
NET "LEDS_K<7>" LOC="T14" | IOSTANDARD = LVCMOS25 | DRIVE = 2;

NET "flash_address<0>"  LOC="M16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<1>"  LOC="K15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<2>"  LOC="J16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<3>"  LOC="F15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<4>"  LOC="H16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<5>"  LOC="K16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<6>"  LOC="H15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<7>"  LOC="F16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<8>"  LOC="E16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<9>"  LOC="D16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<10>" LOC="F14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<11>" LOC="F13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<12>" LOC="C15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<13>" LOC="C16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<14>" LOC="E14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<15>" LOC="E13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<16>" LOC="J12" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<17>" LOC="G16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<18>" LOC="G14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_address<19>" LOC="G13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<0>"  LOC="L16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<1>"  LOC="R15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<2>"  LOC="H14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<3>"  LOC="K13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<4>"  LOC="L14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<5>"  LOC="H13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<6>"  LOC="L13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<7>"  LOC="D14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<8>"  LOC="M15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<9>"  LOC="P15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<10>" LOC="J14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<11>" LOC="K14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<12>" LOC="J13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<13>" LOC="M14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<14>" LOC="N14" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_data<15>" LOC="M13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_n_byte" LOC="N13" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_n_ce" LOC="N16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_n_oe" LOC="P16" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_n_we" LOC="D15" | IOSTANDARD = LVTTL | DRIVE = 2 ;
NET "flash_ready_n_busy" LOC="H11" | IOSTANDARD = LVTTL | PULLUP ;
INST "flash/address_ffs.0.one_ff" IOB = TRUE ;
INST "flash/address_ffs.1.one_ff" IOB = TRUE ;
INST "flash/address_ffs.2.one_ff" IOB = TRUE ;
INST "flash/address_ffs.3.one_ff" IOB = TRUE ;
INST "flash/address_ffs.4.one_ff" IOB = TRUE ;
INST "flash/address_ffs.5.one_ff" IOB = TRUE ;
INST "flash/address_ffs.6.one_ff" IOB = TRUE ;
INST "flash/address_ffs.7.one_ff" IOB = TRUE ;
INST "flash/address_ffs.8.one_ff" IOB = TRUE ;
INST "flash/address_ffs.9.one_ff" IOB = TRUE ;
INST "flash/address_ffs.10.one_ff" IOB = TRUE ;
INST "flash/address_ffs.11.one_ff" IOB = TRUE ;
INST "flash/address_ffs.12.one_ff" IOB = TRUE ;
INST "flash/address_ffs.13.one_ff" IOB = TRUE ;
INST "flash/address_ffs.14.one_ff" IOB = TRUE ;
INST "flash/address_ffs.15.one_ff" IOB = TRUE ;
INST "flash/address_ffs.16.one_ff" IOB = TRUE ;
INST "flash/address_ffs.17.one_ff" IOB = TRUE ;
INST "flash/address_ffs.18.one_ff" IOB = TRUE ;
INST "flash/address_ffs.19.one_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.0.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.0.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.0.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.1.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.1.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.1.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.2.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.2.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.2.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.3.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.3.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.3.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.4.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.4.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.4.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.5.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.5.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.5.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.6.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.6.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.6.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.7.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.7.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.7.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.8.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.8.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.8.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.9.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.9.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.9.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.10.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.10.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.10.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.11.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.11.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.11.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.12.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.12.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.12.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.13.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.13.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.13.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.14.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.14.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.14.oe_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.15.in_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.15.out_ff" IOB = TRUE ;
INST "flash/data_in_out_ffs.15.oe_ff" IOB = TRUE ;
INST "flash/nce_reg" IOB = TRUE;
INST "flash/noe_reg" IOB = TRUE;
INST "flash/nwe_reg" IOB = TRUE;

NET "fpga_done"    LOC = "M11" | IOSTANDARD = LVCMOS25 ;
NET "fpga_busy"    LOC = "B10" | IOSTANDARD = LVCMOS25 | PULLDOWN;
NET "fpga_n_init"  LOC = "N9" | IOSTANDARD = LVCMOS25 | PULLUP;
NET "fpga_n_prog"  LOC = "T4" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_rd_n_wr" LOC = "N7" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_n_cs"    LOC = "P6" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_cclk"    LOC = "P13" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<0>" LOC = "A12" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<1>" LOC = "B12" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<2>" LOC = "A11" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<3>" LOC = "A10" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<4>" LOC = "D10" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<5>" LOC = "C9" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<6>" LOC = "D8" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
NET "fpga_data<7>" LOC = "C10" | IOSTANDARD = LVCMOS25 | DRIVE = 2 ;
INST "fpga/cclk_ff" IOB = TRUE ;
INST "fpga/n_prog_ff" IOB = TRUE ;
INST "fpga/n_cs_ff" IOB = TRUE ;
INST "fpga/rd_n_wr_ff" IOB = TRUE ;
INST "fpga/n_init_ff" IOB = TRUE ;
INST "fpga/busy_ff" IOB = TRUE ;
INST "fpga/done_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.0.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.0.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.0.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.1.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.1.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.1.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.2.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.2.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.2.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.3.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.3.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.3.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.4.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.4.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.4.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.5.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.5.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.5.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.6.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.6.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.6.out_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.7.in_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.7.tri_ff" IOB = TRUE ;
INST "make_fpga_data_ffs.7.out_ff" IOB = TRUE ;


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INST "vga/ascii_buf0" INIT_16 = 6974756C6F732029436F532820706968632D6E6F2D6D657473797320726F6620 ;
INST "vga/ascii_buf0" INIT_17 = 207374726F70707573207463656A6F7270204F4B43454720656854202E736E6F ;
INST "vga/ascii_buf0" INIT_18 = 2020202020202020202020202020202020202020202020202020202020202020 ;
INST "vga/ascii_buf0" INIT_19 = 2020202020202020202020202020202020202020202020202020202020202020 ;
INST "vga/ascii_buf0" INIT_1A = 797320726F662079676F6C6F646F6874656D206E67697365642077656E206120 ;
INST "vga/ascii_buf0" INIT_1B = 2020202020202020202020206863696877202C73706968632D6E6F2D6D657473 ;
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INST "vga/ascii_buf0" INIT_1D = 2020202020202020202020202948464228207365636E65696353206465696C70 ;
INST "vga/ascii_buf0" INIT_1E = 7774666F7320666F206E67697365642D6F632073657461746973736563656E20 ;
INST "vga/ascii_buf0" INIT_1F = 20202020202020202020646E612065726177647261682074736166202C657261 ;
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INST "vga/ascii_buf0" INIT_2A = 6563656E206568742073726566666F206863696877202C6D726F6674616C7020 ;
INST "vga/ascii_buf0" INIT_2B = 20646565707320726F66207265776F7020676E697475706D6F63207972617373 ;
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INST "vga/ascii_buf0" INIT_2D = 2020202020202020202020202020202020202020202020202020202020202020 ;
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INST "vga/ascii_buf0" INIT_3B = 202020202020202020202020202020202020202020202020205F5F5F5F5F5F5F ;
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INST "vga/rom_lo" INIT_00 = 000000007E818199BD8181A5817E000000000000000000000000000000000000 ;
INST "vga/rom_lo" INIT_01 = 0000000010387CFEFEFEFE6C00000000000000007EFFFFE7C3FFFFDBFF7E0000 ;
INST "vga/rom_lo" INIT_02 = 000000003C1818E7E7E73C3C18000000000000000010387CFE7C381000000000 ;
INST "vga/rom_lo" INIT_03 = 000000000000183C3C18000000000000000000003C18187EFFFF7E3C18000000 ;
INST "vga/rom_lo" INIT_04 = 00000000003C664242663C0000000000FFFFFFFFFFFFE7C3C3E7FFFFFFFFFFFF ;
INST "vga/rom_lo" INIT_05 = 0000000078CCCCCCCC78321A0E1E0000FFFFFFFFFFC399BDBD99C3FFFFFFFFFF ;
INST "vga/rom_lo" INIT_06 = 00000000E0F070303030303F333F00000000000018187E183C666666663C0000 ;
INST "vga/rom_lo" INIT_07 = 000000001818DB3CE73CDB1818000000000000C0E6E767636363637F637F0000 ;
INST "vga/rom_lo" INIT_08 = 0000000002060E1E3EFE3E1E0E0602000000000080C0E0F0F8FEF8F0E0C08000 ;
INST "vga/rom_lo" INIT_09 = 000000006666006666666666666600000000000000183C7E1818187E3C180000 ;
INST "vga/rom_lo" INIT_0A = 0000007CC60C386CC6C66C3860C67C00000000001B1B1B1B1B7BDBDBDB7F0000 ;
INST "vga/rom_lo" INIT_0B = 000000007E183C7E1818187E3C18000000000000FEFEFEFE0000000000000000 ;
INST "vga/rom_lo" INIT_0C = 00000000183C7E18181818181818000000000000181818181818187E3C180000 ;
INST "vga/rom_lo" INIT_0D = 0000000000003060FE60300000000000000000000000180CFE0C180000000000 ;
INST "vga/rom_lo" INIT_0E = 0000000000002466FF66240000000000000000000000FEC0C0C0000000000000 ;
INST "vga/rom_lo" INIT_0F = 00000000001038387C7CFEFE000000000000000000FEFE7C7C38381000000000 ;
INST "vga/rom_lo" INIT_10 = 000000001818001818183C3C3C18000000000000000000000000000000000000 ;
INST "vga/rom_lo" INIT_11 = 000000006C6CFE6C6C6CFE6C6C00000000000000000000000000002466666600 ;
INST "vga/rom_lo" INIT_12 = 0000000086C66030180CC6C200000000000018187CC68606067CC0C2C67C1818 ;
INST "vga/rom_lo" INIT_13 = 000000000000000000000060303030000000000076CCCCCCDC76386C6C380000 ;
INST "vga/rom_lo" INIT_14 = 0000000030180C0C0C0C0C0C18300000000000000C18303030303030180C0000 ;
INST "vga/rom_lo" INIT_15 = 00000000000018187E18180000000000000000000000663CFF3C660000000000 ;
INST "vga/rom_lo" INIT_16 = 00000000000000007E0000000000000000000030181818000000000000000000 ;
INST "vga/rom_lo" INIT_17 = 0000000080C06030180C06020000000000000000181800000000000000000000 ;
INST "vga/rom_lo" INIT_18 = 000000007E1818181818187838180000000000007CC6C6E6F6DECEC6C67C0000 ;
INST "vga/rom_lo" INIT_19 = 000000007CC60606063C0606C67C000000000000FEC6C06030180C06C67C0000 ;
INST "vga/rom_lo" INIT_1A = 000000007CC6060606FCC0C0C0FE0000000000001E0C0C0CFECC6C3C1C0C0000 ;
INST "vga/rom_lo" INIT_1B = 0000000030303030180C0606C6FE0000000000007CC6C6C6C6FCC0C060380000 ;
INST "vga/rom_lo" INIT_1C = 00000000780C0606067EC6C6C67C0000000000007CC6C6C6C67CC6C6C67C0000 ;
INST "vga/rom_lo" INIT_1D = 0000000030181800000018180000000000000000001818000000181800000000 ;
INST "vga/rom_lo" INIT_1E = 000000000000007E00007E000000000000000000060C18306030180C06000000 ;
INST "vga/rom_lo" INIT_1F = 000000001818001818180CC6C67C0000000000006030180C060C183060000000 ;
INST "vga/rom_lo" INIT_20 = 00000000C6C6C6C6FEC6C66C38100000000000007CC0DCDEDEDEC6C6C67C0000 ;
INST "vga/rom_lo" INIT_21 = 000000003C66C2C0C0C0C0C2663C000000000000FC666666667C666666FC0000 ;
INST "vga/rom_lo" INIT_22 = 00000000FE6662606878686266FE000000000000F86C6666666666666CF80000 ;
INST "vga/rom_lo" INIT_23 = 000000003A66C6C6DEC0C0C2663C000000000000F06060606878686266FE0000 ;
INST "vga/rom_lo" INIT_24 = 000000003C18181818181818183C000000000000C6C6C6C6C6FEC6C6C6C60000 ;
INST "vga/rom_lo" INIT_25 = 00000000E666666C78786C6666E600000000000078CCCCCC0C0C0C0C0C1E0000 ;
INST "vga/rom_lo" INIT_26 = 00000000C3C3C3C3C3DBFFFFE7C3000000000000FE6662606060606060F00000 ;
INST "vga/rom_lo" INIT_27 = 000000007CC6C6C6C6C6C6C6C67C000000000000C6C6C6C6CEDEFEF6E6C60000 ;
INST "vga/rom_lo" INIT_28 = 00000E0C7CDED6C6C6C6C6C6C67C000000000000F0606060607C666666FC0000 ;
INST "vga/rom_lo" INIT_29 = 000000007CC6C6060C3860C6C67C000000000000E66666666C7C666666FC0000 ;
INST "vga/rom_lo" INIT_2A = 000000007CC6C6C6C6C6C6C6C6C60000000000003C18181818181899DBFF0000 ;
INST "vga/rom_lo" INIT_2B = 000000006666FFDBDBC3C3C3C3C3000000000000183C66C3C3C3C3C3C3C30000 ;
INST "vga/rom_lo" INIT_2C = 000000003C181818183C66C3C3C3000000000000C3C3663C18183C66C3C30000 ;
INST "vga/rom_lo" INIT_2D = 000000003C30303030303030303C000000000000FFC3C16030180C86C3FF0000 ;
INST "vga/rom_lo" INIT_2E = 000000003C0C0C0C0C0C0C0C0C3C00000000000002060E1C3870E0C080000000 ;
INST "vga/rom_lo" INIT_2F = 0000FF00000000000000000000000000000000000000000000000000C66C3810 ;
INST "vga/rom_lo" INIT_30 = 0000000076CCCCCC7C0C78000000000000000000000000000000000000183030 ;
INST "vga/rom_lo" INIT_31 = 000000007CC6C0C0C0C67C0000000000000000007C666666666C786060E00000 ;
INST "vga/rom_lo" INIT_32 = 000000007CC6C0C0FEC67C00000000000000000076CCCCCCCC6C3C0C0C1C0000 ;
INST "vga/rom_lo" INIT_33 = 0078CC0C7CCCCCCCCCCC76000000000000000000F060606060F060646C380000 ;
INST "vga/rom_lo" INIT_34 = 000000003C181818181838001818000000000000E666666666766C6060E00000 ;
INST "vga/rom_lo" INIT_35 = 00000000E6666C78786C666060E00000003C66660606060606060E0006060000 ;
INST "vga/rom_lo" INIT_36 = 00000000DBDBDBDBDBFFE60000000000000000003C1818181818181818380000 ;
INST "vga/rom_lo" INIT_37 = 000000007CC6C6C6C6C67C000000000000000000666666666666DC0000000000 ;
INST "vga/rom_lo" INIT_38 = 001E0C0C7CCCCCCCCCCC76000000000000F060607C6666666666DC0000000000 ;
INST "vga/rom_lo" INIT_39 = 000000007CC60C3860C67C000000000000000000F06060606676DC0000000000 ;
INST "vga/rom_lo" INIT_3A = 0000000076CCCCCCCCCCCC0000000000000000001C3630303030FC3030100000 ;
INST "vga/rom_lo" INIT_3B = 0000000066FFDBDBC3C3C3000000000000000000183C66C3C3C3C30000000000 ;
INST "vga/rom_lo" INIT_3C = 00F80C067EC6C6C6C6C6C6000000000000000000C3663C183C66C30000000000 ;
INST "vga/rom_lo" INIT_3D = 000000000E18181818701818180E000000000000FEC6603018CCFE0000000000 ;
INST "vga/rom_lo" INIT_3E = 0000000070181818180E18181870000000000000181818181800181818180000 ;
INST "vga/rom_lo" INIT_3F = 0000000000FEC6C6C66C381000000000000000000000000000000000DC760000 ;

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