URL
https://opencores.org/ocsvn/gpio/gpio/trunk
Subversion Repositories gpio
[/] [gpio/] [trunk/] [sim/] [rtl_sim/] [log/] [ncelab.log] - Rev 65
Compare with Previous | Blame | View Log
TOOL: ncelab 04.10-b001: Started on Dec 17, 2003 at 12:34:14
ncelab
-f ncelab.args
-MESSAGES
-NOCOPYRIGHT
-CDSLIB ../bin/cds.lib
-HDLVAR ../bin/hdl.var
-LOGFILE ../log/ncelab.log
-SNAPSHOT worklib.bench:rtl
-NO_TCHK_MSG
-ACCESS +RWC
worklib.tb_tasks
worklib.gpio_testbench
Elaborating the design hierarchy:
Caching library 'worklib' ....... Done
Building instance overlay tables: .................... Done
Generating native compiled code:
worklib.clkrst:v <0x67faf15a>
streams: 2, words: 1034
worklib.gpio_mon:v <0x50b5485b>
streams: 6, words: 1408
worklib.gpio_testbench:v <0x26ac113d>
streams: 2, words: 300
worklib.gpio_top:v <0x566f67ec>
streams: 205, words: 164573
worklib.tb_tasks:v <0x0ae72b6b>
streams: 39, words: 57166
worklib.wb_master:v <0x008f4b18>
streams: 38, words: 21666
Loading native compiled code: .................... Done
Building instance specific data structures.
Design hierarchy summary:
Instances Unique
Modules: 6 6
Registers: 130 130
Scalar wires: 85 -
Vectored wires: 13 -
Always blocks: 56 56
Initial blocks: 3 3
Cont. assignments: 40 79
Pseudo assignments: 2 49
Simulation timescale: 10ps
Writing initial simulation snapshot: worklib.bench:rtl
TOOL: ncelab 04.10-b001: Exiting on Dec 17, 2003 at 12:34:15 (total: 00:00:01)