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[/] [gpio/] [trunk/] [sim/] [rtl_sim/] [log/] [ncsim.log] - Rev 56

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TOOL:   ncsim   04.10-b001: Started on Dec 17, 2003 at 12:34:15
ncsim
    -LICQUEUE
    -f ./ncsim.args
        -MESSAGES
        -NOCOPYRIGHT
        -CDSLIB ../bin/cds.lib
        -HDLVAR ../bin/hdl.var
        -INPUT ncsim.tcl
        -LOGFILE ../log/ncsim.log
        worklib.bench:rtl

Loading snapshot worklib.bench:rtl .................... Done
ncsim> source /shared/tools/ncsim/tools/inca/files/ncsimrc
ncsim> database -open waves -shm -into ../out/waves.shm
Created SHM database waves
ncsim> probe -create -database waves gpio_testbench -shm -all -depth all
Created probe 1
ncsim> run

###
### GPIO IP Core Verification ###
###

I. Testing correct operation of RGPIO_CTRL control bits

  Testing control bit RGPIO_CTRL[ECLK] ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... OK
  Testing control bit RGPIO_CTRL[NEC] ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... OK
  Testing control bit RGPIO_CTRL[INTE] and RGPIO_CTRL[INT] ... OK

II. Testing modes of operation ...

  Testing input mode ... OK
  Testing output mode ... OK
  Testing bidirectional I/O ... OK
  Testing auxiliary feature ... OK
  Testing ptrig features ... OK

###
### FAILED TESTS:           0 ###
###

report (deaddead)
exit (00000000)
/projects/highland/gorand/gpio/bench/verilog/tb_tasks.v:1095   $finish(0);
ncsim> quit
TOOL:   ncsim   04.10-b001: Exiting on Dec 17, 2003 at 12:35:10  (total: 00:00:55)

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