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[/] [ha1588/] [trunk/] [rtl/] [tsu/] [ptp_queue.v] - Rev 51
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// megafunction wizard: %FIFO% // GENERATION: STANDARD // VERSION: WM1.0 // MODULE: dcfifo // ============================================================ // File Name: ptp_queue.v // Megafunction Name(s): // dcfifo // // Simulation Library Files(s): // altera_mf // ============================================================ // ************************************************************ // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! // // 10.1 Build 197 01/19/2011 SP 1 SJ Full Version // ************************************************************ //Copyright (C) 1991-2011 Altera Corporation //Your use of Altera Corporation's design tools, logic functions //and other software and tools, and its AMPP partner logic //functions, and any output files from any of the foregoing //(including device programming or simulation files), and any //associated documentation or information are expressly subject //to the terms and conditions of the Altera Program License //Subscription Agreement, Altera MegaCore Function License //Agreement, or other applicable license agreement, including, //without limitation, that your use is for the sole purpose of //programming logic devices manufactured by Altera and sold by //Altera or its authorized distributors. Please refer to the //applicable agreement for further details. // synopsys translate_off `timescale 1 ps / 1 ps // synopsys translate_on module ptp_queue ( aclr, data, rdclk, rdreq, wrclk, wrreq, q, rdusedw, wrusedw); input aclr; input [127:0] data; input rdclk; input rdreq; input wrclk; input wrreq; output [127:0] q; output [3:0] rdusedw; output [3:0] wrusedw; `ifndef ALTERA_RESERVED_QIS // synopsys translate_off `endif tri0 aclr; `ifndef ALTERA_RESERVED_QIS // synopsys translate_on `endif wire [127:0] sub_wire0; wire [3:0] sub_wire1; wire [3:0] sub_wire2; wire [127:0] q = sub_wire0[127:0]; wire [3:0] wrusedw = sub_wire1[3:0]; wire [3:0] rdusedw = sub_wire2[3:0]; dcfifo dcfifo_component ( .rdclk (rdclk), .wrclk (wrclk), .wrreq (wrreq), .aclr (aclr), .data (data), .rdreq (rdreq), .q (sub_wire0), .wrusedw (sub_wire1), .rdusedw (sub_wire2), .rdempty (), .rdfull (), .wrempty (), .wrfull ()); defparam dcfifo_component.intended_device_family = "Cyclone III", dcfifo_component.lpm_numwords = 16, dcfifo_component.lpm_showahead = "OFF", dcfifo_component.lpm_type = "dcfifo", dcfifo_component.lpm_width = 128, dcfifo_component.lpm_widthu = 4, dcfifo_component.overflow_checking = "ON", dcfifo_component.rdsync_delaypipe = 4, dcfifo_component.underflow_checking = "ON", dcfifo_component.use_eab = "ON", dcfifo_component.write_aclr_synch = "OFF", dcfifo_component.wrsync_delaypipe = 4; endmodule // ============================================================ // CNX file retrieval info // ============================================================ // Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" // Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" // Retrieval info: PRIVATE: AlmostFull NUMERIC "0" // Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" // Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" // Retrieval info: PRIVATE: Clock NUMERIC "4" // Retrieval info: PRIVATE: Depth NUMERIC "16" // Retrieval info: PRIVATE: Empty NUMERIC "1" // Retrieval info: PRIVATE: Full NUMERIC "1" // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III" // Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" // Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1" // Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" // Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" // Retrieval info: PRIVATE: Optimize NUMERIC "2" // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" // Retrieval info: PRIVATE: UsedW NUMERIC "1" // Retrieval info: PRIVATE: Width NUMERIC "128" // Retrieval info: PRIVATE: dc_aclr NUMERIC "1" // Retrieval info: PRIVATE: diff_widths NUMERIC "0" // Retrieval info: PRIVATE: msb_usedw NUMERIC "0" // Retrieval info: PRIVATE: output_width NUMERIC "128" // Retrieval info: PRIVATE: rsEmpty NUMERIC "0" // Retrieval info: PRIVATE: rsFull NUMERIC "0" // Retrieval info: PRIVATE: rsUsedW NUMERIC "1" // Retrieval info: PRIVATE: sc_aclr NUMERIC "0" // Retrieval info: PRIVATE: sc_sclr NUMERIC "0" // Retrieval info: PRIVATE: wsEmpty NUMERIC "0" // Retrieval info: PRIVATE: wsFull NUMERIC "0" // Retrieval info: PRIVATE: wsUsedW NUMERIC "1" // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" // Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "16" // Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF" // Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" // Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "128" // Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "4" // Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" // Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "4" // Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" // Retrieval info: CONSTANT: USE_EAB STRING "ON" // Retrieval info: CONSTANT: WRITE_ACLR_SYNCH STRING "OFF" // Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "4" // Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND "aclr" // Retrieval info: USED_PORT: data 0 0 128 0 INPUT NODEFVAL "data[127..0]" // Retrieval info: USED_PORT: q 0 0 128 0 OUTPUT NODEFVAL "q[127..0]" // Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL "rdclk" // Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" // Retrieval info: USED_PORT: rdusedw 0 0 4 0 OUTPUT NODEFVAL "rdusedw[3..0]" // Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL "wrclk" // Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" // Retrieval info: USED_PORT: wrusedw 0 0 4 0 OUTPUT NODEFVAL "wrusedw[3..0]" // Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 // Retrieval info: CONNECT: @data 0 0 128 0 data 0 0 128 0 // Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 // Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 // Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 // Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 // Retrieval info: CONNECT: q 0 0 128 0 @q 0 0 128 0 // Retrieval info: CONNECT: rdusedw 0 0 4 0 @rdusedw 0 0 4 0 // Retrieval info: CONNECT: wrusedw 0 0 4 0 @wrusedw 0 0 4 0 // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue.inc FALSE // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue.cmp FALSE // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue.bsf FALSE // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue_inst.v FALSE // Retrieval info: GEN_FILE: TYPE_NORMAL ptp_queue_bb.v FALSE // Retrieval info: LIB_FILE: altera_mf
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