Subversion Repositories ha1588

#Please do not modify this file by hand
XmpVersion: 14.3
VerMgmt: 14.3
IntStyle: default
Flow: ise
ModuleSearchPath: ../../rtl/bus/xps/pcores/ha1588_axi_v1_00_a/../../../
ModuleSearchPath: ../../
MHS File: system.mhs
Architecture: zynq
Device: xc7z020
Package: clg400
SpeedGrade: -2
UserCmd1: 
UserCmd1Type: 0
UserCmd2: 
UserCmd2Type: 0
GenSimTB: 0
SdkExportBmmBit: 1
SdkExportDir: SDK/SDK_Export
InsertNoPads: 0
WarnForEAArch: 1
HdlLang: Verilog
SimModel: BEHAVIORAL
ExternalMemSim: 0
UcfFile: data/system.ucf
EnableParTimingError: 1
ShowLicenseDialog: 1
BInfo: 
LockAddr: ha1588_axi_0,C_S_AXI_REG_RNG00_BASEADDR