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// File: deflate.v // Generated by MyHDL 0.10 // Date: Tue Jan 1 11:29:55 2019 `timescale 1ns/10ps module deflate ( i_mode, o_done, i_data, o_iprogress, o_oprogress, o_byte, i_waddr, i_raddr, clk, reset ); // Deflate (de)compress // // Ports: input [2:0] i_mode; output o_done; reg o_done; input [7:0] i_data; output [23:0] o_iprogress; reg [23:0] o_iprogress; output [23:0] o_oprogress; reg [23:0] o_oprogress; output [7:0] o_byte; reg [7:0] o_byte; input [5:0] i_waddr; input [14:0] i_raddr; input clk; input reset; reg [18:0] wleaf; reg [9:0] step; reg static; reg [4:0] state; reg [8:0] spread_i; reg [9:0] spread; reg [18:0] rleaf; reg [14:0] reverse; reg [7:0] orbyte; reg [14:0] oraddr; reg [23:0] old_di; reg [14:0] offset; reg [7:0] obyte; reg [7:0] ob1; reg [14:0] oaddr; reg [8:0] numLiterals; reg [5:0] numDistance; reg [8:0] numCodeLength; reg [2:0] nb; reg [4:0] minBits; reg [2:0] method; reg [4:0] maxBits; reg [14:0] lwaddr; reg [14:0] lraddr; reg [14:0] length; reg [18:0] leaf; reg [14:0] lastToken; reg [15:0] ladler1; reg [23:0] isize; reg [9:0] instantMaxBit; reg [14:0] instantMask; reg [8:0] howOften; reg flush; reg final; reg filled; reg [2:0] doo; reg do_compress; reg [23:0] do; reg [2:0] dio; reg [23:0] di; reg [4:0] d_maxBits; reg [9:0] d_instantMaxBit; reg [14:0] d_instantMask; reg [8:0] cur_static; reg signed [24:0] cur_search; reg [3:0] cur_next; reg [23:0] cur_i; reg signed [6:0] cur_dist; reg [23:0] cur_cstatic; reg [15:0] cur_HF1; reg [7:0] copy2; reg [7:0] copy1; reg [14:0] code; reg [3:0] bits; reg [8:0] b_numCodeLength; reg [7:0] b9; reg [7:0] b8; reg [7:0] b7; reg [7:0] b6; reg [7:0] b5; wire [31:0] b41; reg [7:0] b4; reg [7:0] b3; reg [7:0] b2; wire [39:0] b15; wire [31:0] b14; wire [79:0] b110; reg [7:0] b10; reg [7:0] b1; reg [15:0] adler2; reg [15:0] adler1; reg [255:0] cwindow; reg [7:0] oram [0:32768-1]; reg [15:0] nextCode [0:16-1]; reg [18:0] leaves [0:512-1]; reg [7:0] iram [0:64-1]; reg [3:0] distanceLength [0:32-1]; reg d_leaves [0:1-1]; reg [3:0] codeLength [0:320-1]; reg [8:0] bitLengthCount [0:16-1]; wire smatch [0:32-1]; assign b41[32-1:24] = b4; assign b41[24-1:16] = b3; assign b41[16-1:8] = b2; assign b41[8-1:0] = b1; assign b15[40-1:32] = b1; assign b15[32-1:24] = b2; assign b15[24-1:16] = b3; assign b15[16-1:8] = b4; assign b15[8-1:0] = b5; assign b14[32-1:24] = b1; assign b14[24-1:16] = b2; assign b14[16-1:8] = b3; assign b14[8-1:0] = b4; assign b110[80-1:72] = b1; assign b110[72-1:64] = b2; assign b110[64-1:56] = b3; assign b110[56-1:48] = b4; assign b110[48-1:40] = b5; assign b110[40-1:32] = b6; assign b110[32-1:24] = b7; assign b110[24-1:16] = b8; assign b110[16-1:8] = b9; assign b110[8-1:0] = b10; task MYHDL3_adv; input width; integer width; integer nshift; begin: MYHDL115_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL4_get4; input boffset; input width; begin: MYHDL116_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL4_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL116_RETURN; end endfunction function integer MYHDL5_get4; input boffset; input width; integer width; begin: MYHDL117_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL5_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL117_RETURN; end endfunction task MYHDL6_adv; input width; integer width; integer nshift; begin: MYHDL118_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask task MYHDL7_adv; input width; integer width; integer nshift; begin: MYHDL119_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL8_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL120_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL8_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL120_RETURN; end endfunction task MYHDL9_adv; input width; integer width; integer nshift; begin: MYHDL121_RETURN nshift = $signed(($signed({1'b0, dio}) + width) >>> 3); o_iprogress <= di; dio <= (($signed({1'b0, dio}) + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL10_put; input d; integer d; input width; integer width; begin: MYHDL122_RETURN if ((width > 9)) begin $finish; end if (($signed({1'b0, d}) > ((1 << width) - 1))) begin $finish; end MYHDL10_put = ((ob1 | (d << doo)) & 255); disable MYHDL122_RETURN; end endfunction task MYHDL11_put_adv; input d; integer d; input width; integer width; reg pshift; integer carry; integer doo_next; begin: MYHDL123_RETURN if ((width > 9)) begin $finish; end if (($signed({1'b0, d}) > ((1 << width) - 1))) begin $finish; end pshift = ((doo + width) > 8); if (pshift) begin carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo}))); ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry)); end else begin ob1 <= (ob1 | (d << doo)); end do <= (do + pshift); o_oprogress <= (do + pshift); doo_next = ((doo + width) & 7); if ((doo_next == 0)) begin flush <= 1'b1; end doo <= doo_next; end endtask task MYHDL12_do_flush; begin: MYHDL124_RETURN flush <= 1'b0; ob1 <= 0; o_oprogress <= (do + 1); do <= (do + 1); end endtask function integer MYHDL13_put; input d; integer d; input [4-1:0] width; begin: MYHDL125_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end MYHDL13_put = (($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))) & 255); disable MYHDL125_RETURN; end endfunction task MYHDL14_put_adv; input d; integer d; input [4-1:0] width; reg pshift; integer carry; integer doo_next; begin: MYHDL126_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end pshift = ((doo + width) > 8); if (pshift) begin carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo}))); ob1 <= $signed(d >>> ($signed({1'b0, width}) - carry)); end else begin ob1 <= ($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))); end do <= (do + pshift); o_oprogress <= (do + pshift); doo_next = ((doo + width) & 7); if ((doo_next == 0)) begin flush <= 1'b1; end doo <= doo_next; end endtask task MYHDL15_do_flush; begin: MYHDL127_RETURN flush <= 1'b0; ob1 <= 0; o_oprogress <= (do + 1); do <= (do + 1); end endtask function integer MYHDL16_put; input d; integer d; input [4-1:0] width; begin: MYHDL128_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end MYHDL16_put = (($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))) & 255); disable MYHDL128_RETURN; end endfunction task MYHDL17_put_adv; input d; integer d; input [4-1:0] width; reg pshift; integer carry; integer doo_next; begin: MYHDL129_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end pshift = ((doo + width) > 8); if (pshift) begin carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo}))); ob1 <= $signed(d >>> ($signed({1'b0, width}) - carry)); end else begin ob1 <= ($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))); end do <= (do + pshift); o_oprogress <= (do + pshift); doo_next = ((doo + width) & 7); if ((doo_next == 0)) begin flush <= 1'b1; end doo <= doo_next; end endtask function integer MYHDL18_rev_bits; input [24-1:0] b; input nb; integer nb; integer r; begin: MYHDL130_RETURN if ((b >= (1 << nb))) begin $finish; $write("too few bits"); $write("\n"); end if ((nb > 15)) begin $finish; end r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14)); r = r >>> (15 - $signed({1'b0, nb})); MYHDL18_rev_bits = r; disable MYHDL130_RETURN; end endfunction function integer MYHDL19_put; input d; integer d; input width; integer width; begin: MYHDL131_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end MYHDL19_put = (($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))) & 255); disable MYHDL131_RETURN; end endfunction task MYHDL20_put_adv; input d; integer d; input width; integer width; reg pshift; integer carry; integer doo_next; begin: MYHDL132_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end pshift = (($signed({1'b0, doo}) + width) > 8); if (pshift) begin carry = (width - (8 - $signed({1'b0, doo}))); ob1 <= $signed(d >>> (width - carry)); end else begin ob1 <= ($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))); end do <= (do + pshift); o_oprogress <= (do + pshift); doo_next = (($signed({1'b0, doo}) + width) & 7); if ((doo_next == 0)) begin flush <= 1'b1; end doo <= doo_next; end endtask function integer MYHDL23_put; input d; integer d; input [4-1:0] width; begin: MYHDL133_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end MYHDL23_put = (($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))) & 255); disable MYHDL133_RETURN; end endfunction task MYHDL24_put_adv; input d; integer d; input [4-1:0] width; reg pshift; integer carry; integer doo_next; begin: MYHDL134_RETURN if ((width > 9)) begin $finish; end if ((d > ((1 << width) - 1))) begin $finish; end pshift = ((doo + width) > 8); if (pshift) begin carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo}))); ob1 <= $signed(d >>> ($signed({1'b0, width}) - carry)); end else begin ob1 <= ($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))); end do <= (do + pshift); o_oprogress <= (do + pshift); doo_next = ((doo + width) & 7); if ((doo_next == 0)) begin flush <= 1'b1; end doo <= doo_next; end endtask function integer MYHDL33_get4; input boffset; input width; integer width; begin: MYHDL135_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL33_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL135_RETURN; end endfunction function integer MYHDL34_get4; input boffset; input width; integer width; begin: MYHDL136_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL34_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL136_RETURN; end endfunction function integer MYHDL35_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL137_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL35_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL137_RETURN; end endfunction function integer MYHDL36_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL138_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL36_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL138_RETURN; end endfunction function integer MYHDL37_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL139_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL37_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL139_RETURN; end endfunction function integer MYHDL38_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL140_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL38_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL140_RETURN; end endfunction task MYHDL39_adv; input width; integer width; integer nshift; begin: MYHDL141_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL40_get4; input boffset; input width; integer width; begin: MYHDL142_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL40_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL142_RETURN; end endfunction task MYHDL41_adv; input width; integer width; integer nshift; begin: MYHDL143_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL42_get4; input boffset; input width; integer width; begin: MYHDL144_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL42_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL144_RETURN; end endfunction function integer MYHDL43_get4; input boffset; input width; integer width; begin: MYHDL145_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL43_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL145_RETURN; end endfunction function integer MYHDL44_get4; input boffset; input width; integer width; begin: MYHDL146_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL44_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL146_RETURN; end endfunction task MYHDL45_adv; input width; integer width; integer nshift; begin: MYHDL147_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL52_rev_bits; input [16-1:0] b; input [4-1:0] nb; integer r; begin: MYHDL148_RETURN if ((b >= (1 << nb))) begin $finish; $write("too few bits"); $write("\n"); end if ((nb > 15)) begin $finish; end r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14)); r = r >>> (15 - $signed({1'b0, nb})); MYHDL52_rev_bits = r; disable MYHDL148_RETURN; end endfunction function integer MYHDL53_makeLeaf; input [9-1:0] lcode; input [4-1:0] lbits; begin: MYHDL149_RETURN if ((lcode >= (1 << 15))) begin $finish; end if ((lbits >= (1 << 4))) begin $finish; end MYHDL53_makeLeaf = ((lcode << 4) | lbits); disable MYHDL149_RETURN; end endfunction function integer MYHDL54_makeLeaf; input [9-1:0] lcode; input [4-1:0] lbits; begin: MYHDL150_RETURN if ((lcode >= (1 << 15))) begin $finish; end if ((lbits >= (1 << 4))) begin $finish; end MYHDL54_makeLeaf = ((lcode << 4) | lbits); disable MYHDL150_RETURN; end endfunction function integer MYHDL55_makeLeaf; input [9-1:0] lcode; input [4-1:0] lbits; begin: MYHDL151_RETURN if ((lcode >= (1 << 15))) begin $finish; end if ((lbits >= (1 << 4))) begin $finish; end MYHDL55_makeLeaf = ((lcode << 4) | lbits); disable MYHDL151_RETURN; end endfunction function integer MYHDL56_get4; input boffset; input [5-1:0] width; begin: MYHDL152_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL56_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL152_RETURN; end endfunction function integer MYHDL57_get_bits; input [19-1:0] aleaf; begin: MYHDL153_RETURN MYHDL57_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL153_RETURN; end endfunction function integer MYHDL58_get4; input boffset; input [5-1:0] width; begin: MYHDL154_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL58_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL154_RETURN; end endfunction function integer MYHDL59_get_bits; input [19-1:0] aleaf; begin: MYHDL155_RETURN MYHDL59_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL155_RETURN; end endfunction function integer MYHDL60_get_bits; input [19-1:0] aleaf; begin: MYHDL156_RETURN MYHDL60_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL156_RETURN; end endfunction task MYHDL61_adv; input width; integer width; integer nshift; begin: MYHDL157_RETURN nshift = $signed(($signed({1'b0, dio}) + width) >>> 3); o_iprogress <= di; dio <= (($signed({1'b0, dio}) + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL62_get_code; input [19-1:0] aleaf; begin: MYHDL158_RETURN MYHDL62_get_code = (aleaf >>> 4); disable MYHDL158_RETURN; end endfunction function integer MYHDL63_get4; input boffset; integer boffset; input [5-1:0] width; begin: MYHDL159_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL63_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL159_RETURN; end endfunction function integer MYHDL64_get_bits; input [19-1:0] aleaf; begin: MYHDL160_RETURN MYHDL64_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL160_RETURN; end endfunction function integer MYHDL65_get4; input boffset; integer boffset; input [5-1:0] width; begin: MYHDL161_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL65_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL161_RETURN; end endfunction function integer MYHDL66_get_bits; input [19-1:0] aleaf; begin: MYHDL162_RETURN MYHDL66_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL162_RETURN; end endfunction function integer MYHDL67_get4; input boffset; input width; integer width; begin: MYHDL163_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL67_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL163_RETURN; end endfunction function integer MYHDL68_get_code; input [19-1:0] aleaf; begin: MYHDL164_RETURN MYHDL68_get_code = (aleaf >>> 4); disable MYHDL164_RETURN; end endfunction function integer MYHDL69_get_bits; input [19-1:0] aleaf; begin: MYHDL165_RETURN MYHDL69_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL165_RETURN; end endfunction function integer MYHDL70_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL166_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL70_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL166_RETURN; end endfunction function integer MYHDL71_get_bits; input [19-1:0] aleaf; begin: MYHDL167_RETURN MYHDL71_get_bits = ($signed({1'b0, aleaf}) & ((1 << 4) - 1)); disable MYHDL167_RETURN; end endfunction task MYHDL72_adv; input width; integer width; integer nshift; begin: MYHDL168_RETURN nshift = $signed(($signed({1'b0, dio}) + width) >>> 3); o_iprogress <= di; dio <= (($signed({1'b0, dio}) + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask function integer MYHDL73_get4; input boffset; input width; integer width; begin: MYHDL169_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL73_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1)); disable MYHDL169_RETURN; end endfunction function integer MYHDL74_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL170_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL74_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL170_RETURN; end endfunction function integer MYHDL75_rev_bits; input b; integer b; input nb; integer nb; integer r; begin: MYHDL171_RETURN if ((b >= (1 << nb))) begin $finish; $write("too few bits"); $write("\n"); end if ((nb > 15)) begin $finish; end r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14)); r = r >>> (15 - $signed({1'b0, nb})); MYHDL75_rev_bits = r; disable MYHDL171_RETURN; end endfunction function integer MYHDL76_get4; input boffset; integer boffset; input width; integer width; begin: MYHDL172_RETURN if ((nb != 4)) begin $write("----NB----"); $write("\n"); $finish; end MYHDL76_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1)); disable MYHDL172_RETURN; end endfunction task MYHDL77_adv; input width; integer width; integer nshift; begin: MYHDL173_RETURN nshift = $signed(($signed({1'b0, dio}) + width) >>> 3); o_iprogress <= di; dio <= (($signed({1'b0, dio}) + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask task MYHDL78_adv; input width; integer width; integer nshift; begin: MYHDL174_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask task MYHDL79_adv; input width; integer width; integer nshift; begin: MYHDL175_RETURN nshift = ((dio + width) >>> 3); o_iprogress <= di; dio <= ((dio + width) & 7); di <= ($signed({1'b0, di}) + nshift); if ((nshift != 0)) begin filled <= 1'b0; end end endtask always @(posedge clk) begin: DEFLATE_IO_LOGIC o_byte <= oram[(i_raddr & 32767)]; if ((i_mode == 2)) begin iram[(i_waddr & 63)] <= i_data; isize <= i_waddr; end end always @(posedge clk) begin: DEFLATE_LOGIC integer hm; integer skip; reg no_adv; integer cs_i; reg [4-1:0] outlen; integer outbits; reg [8-1:0] bdata; integer adler1_next; integer lencode; integer nextdist; integer copydist; integer extra_dist; integer extra_bits; integer outcode; reg [15-1:0] lfmatch; integer distance; integer fmatch2; integer match; reg found; integer fmatch; integer si; integer stat_i; integer clo_i; integer n_adv; integer dbl_i; integer dbl; integer dist_i; integer limit; reg [4-1:0] j; integer t; integer hf2_i; reg [5-1:0] amb; integer ncode; reg [16-1:0] canonical; reg [4-1:0] bits_next; reg [15-1:0] aim; integer cto; integer mask; integer token; integer extraLength; integer tlength; integer distanceCode; integer moreBits; integer mored; if ((!reset)) begin $write("DEFLATE RESET"); $write("\n"); state <= 5'b00000; o_done <= 1'b0; end else begin case (state) 5'b00000: begin if ((1'b1 && (i_mode == 4))) begin $write("STARTC"); $write("\n"); do_compress <= 1'b1; method <= 1; o_done <= 1'b0; o_iprogress <= 0; o_oprogress <= 0; di <= 0; dio <= 0; do <= 0; doo <= 0; filled <= 1'b1; cur_static <= 0; state <= 5'b01110; end else if ((1'b1 && (i_mode == 5))) begin do_compress <= 1'b0; o_done <= 1'b0; o_iprogress <= 0; o_oprogress <= 0; di <= 0; dio <= 0; do <= 0; doo <= 0; filled <= 1'b1; state <= 5'b00001; end else begin // pass end end 5'b00001: begin if ((!1'b1)) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((di == 0)) begin if ((b1 == 120)) begin $write("deflate mode"); $write("\n"); end else begin $write("%h", di); $write(" "); $write("%h", dio); $write(" "); $write("%h", nb); $write(" "); $write("%h", b1); $write(" "); $write("%h", b2); $write(" "); $write("%h", b3); $write(" "); $write("%h", b4); $write(" "); $write("%h", isize); $write("\n"); $finish; o_done <= 1'b1; state <= 5'b00000; end MYHDL3_adv(16); end else begin if (MYHDL4_get4(0, 1)) begin $write("final"); $write("\n"); final <= 1'b1; end hm = MYHDL5_get4(1, 2); method <= hm; $write("method"); $write(" "); $write("%0d", hm); $write("\n"); case (hm) 'h2: begin if ((!1'b0)) begin $write("dynamic tree mode disabled"); $write("\n"); $finish; end state <= 5'b00010; numCodeLength <= 0; numLiterals <= 0; static <= 1'b0; MYHDL6_adv(3); end 'h1: begin static <= 1'b1; cur_static <= 0; state <= 5'b01110; MYHDL7_adv(3); end 'h0: begin state <= 5'b10101; skip = (8 - dio); if ((skip <= 2)) begin skip = (16 - dio); end length <= MYHDL8_get4(skip, 16); MYHDL9_adv((skip + 16)); cur_i <= 0; offset <= 7; end default: begin state <= 5'b00000; $write("Bad method"); $write("\n"); $finish; end endcase end end 5'b10110: begin no_adv = 0; if ((!1'b1)) begin // pass end else if ((!filled)) begin no_adv = 1; filled <= 1'b1; end else if ((nb < 4)) begin no_adv = 1; // pass end else if ((cur_cstatic == 0)) begin flush <= 1'b0; ob1 <= 0; adler1 <= 1; adler2 <= 0; ladler1 <= 0; oaddr <= 0; obyte <= 120; end else if ((cur_cstatic == 1)) begin oaddr <= 1; obyte <= 156; do <= 2; end else if ((cur_cstatic == 2)) begin oaddr <= do; obyte <= MYHDL10_put(3, 3); MYHDL11_put_adv(3, 3); end else if (flush) begin no_adv = 1; oaddr <= do; obyte <= ob1; MYHDL12_do_flush; end else if ((($signed({1'b0, cur_cstatic}) >= ($signed({1'b0, isize}) - 10)) && (i_mode != 0))) begin $write("P"); $write(" "); $write("%h", cur_cstatic); $write(" "); $write("%h", isize); $write("\n"); no_adv = 1; end else if ((($signed({1'b0, cur_cstatic}) - 3) > isize)) begin if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 1))) begin $write("Put EOF"); $write(" "); $write("%h", do); $write("\n"); cs_i = 256; outlen = codeLength[cs_i]; case (cs_i) 0: outbits = 12; 1: outbits = 140; 2: outbits = 76; 3: outbits = 204; 4: outbits = 44; 5: outbits = 172; 6: outbits = 108; 7: outbits = 236; 8: outbits = 28; 9: outbits = 156; 10: outbits = 92; 11: outbits = 220; 12: outbits = 60; 13: outbits = 188; 14: outbits = 124; 15: outbits = 252; 16: outbits = 2; 17: outbits = 130; 18: outbits = 66; 19: outbits = 194; 20: outbits = 34; 21: outbits = 162; 22: outbits = 98; 23: outbits = 226; 24: outbits = 18; 25: outbits = 146; 26: outbits = 82; 27: outbits = 210; 28: outbits = 50; 29: outbits = 178; 30: outbits = 114; 31: outbits = 242; 32: outbits = 10; 33: outbits = 138; 34: outbits = 74; 35: outbits = 202; 36: outbits = 42; 37: outbits = 170; 38: outbits = 106; 39: outbits = 234; 40: outbits = 26; 41: outbits = 154; 42: outbits = 90; 43: outbits = 218; 44: outbits = 58; 45: outbits = 186; 46: outbits = 122; 47: outbits = 250; 48: outbits = 6; 49: outbits = 134; 50: outbits = 70; 51: outbits = 198; 52: outbits = 38; 53: outbits = 166; 54: outbits = 102; 55: outbits = 230; 56: outbits = 22; 57: outbits = 150; 58: outbits = 86; 59: outbits = 214; 60: outbits = 54; 61: outbits = 182; 62: outbits = 118; 63: outbits = 246; 64: outbits = 14; 65: outbits = 142; 66: outbits = 78; 67: outbits = 206; 68: outbits = 46; 69: outbits = 174; 70: outbits = 110; 71: outbits = 238; 72: outbits = 30; 73: outbits = 158; 74: outbits = 94; 75: outbits = 222; 76: outbits = 62; 77: outbits = 190; 78: outbits = 126; 79: outbits = 254; 80: outbits = 1; 81: outbits = 129; 82: outbits = 65; 83: outbits = 193; 84: outbits = 33; 85: outbits = 161; 86: outbits = 97; 87: outbits = 225; 88: outbits = 17; 89: outbits = 145; 90: outbits = 81; 91: outbits = 209; 92: outbits = 49; 93: outbits = 177; 94: outbits = 113; 95: outbits = 241; 96: outbits = 9; 97: outbits = 137; 98: outbits = 73; 99: outbits = 201; 100: outbits = 41; 101: outbits = 169; 102: outbits = 105; 103: outbits = 233; 104: outbits = 25; 105: outbits = 153; 106: outbits = 89; 107: outbits = 217; 108: outbits = 57; 109: outbits = 185; 110: outbits = 121; 111: outbits = 249; 112: outbits = 5; 113: outbits = 133; 114: outbits = 69; 115: outbits = 197; 116: outbits = 37; 117: outbits = 165; 118: outbits = 101; 119: outbits = 229; 120: outbits = 21; 121: outbits = 149; 122: outbits = 85; 123: outbits = 213; 124: outbits = 53; 125: outbits = 181; 126: outbits = 117; 127: outbits = 245; 128: outbits = 13; 129: outbits = 141; 130: outbits = 77; 131: outbits = 205; 132: outbits = 45; 133: outbits = 173; 134: outbits = 109; 135: outbits = 237; 136: outbits = 29; 137: outbits = 157; 138: outbits = 93; 139: outbits = 221; 140: outbits = 61; 141: outbits = 189; 142: outbits = 125; 143: outbits = 253; 144: outbits = 19; 145: outbits = 275; 146: outbits = 147; 147: outbits = 403; 148: outbits = 83; 149: outbits = 339; 150: outbits = 211; 151: outbits = 467; 152: outbits = 51; 153: outbits = 307; 154: outbits = 179; 155: outbits = 435; 156: outbits = 115; 157: outbits = 371; 158: outbits = 243; 159: outbits = 499; 160: outbits = 11; 161: outbits = 267; 162: outbits = 139; 163: outbits = 395; 164: outbits = 75; 165: outbits = 331; 166: outbits = 203; 167: outbits = 459; 168: outbits = 43; 169: outbits = 299; 170: outbits = 171; 171: outbits = 427; 172: outbits = 107; 173: outbits = 363; 174: outbits = 235; 175: outbits = 491; 176: outbits = 27; 177: outbits = 283; 178: outbits = 155; 179: outbits = 411; 180: outbits = 91; 181: outbits = 347; 182: outbits = 219; 183: outbits = 475; 184: outbits = 59; 185: outbits = 315; 186: outbits = 187; 187: outbits = 443; 188: outbits = 123; 189: outbits = 379; 190: outbits = 251; 191: outbits = 507; 192: outbits = 7; 193: outbits = 263; 194: outbits = 135; 195: outbits = 391; 196: outbits = 71; 197: outbits = 327; 198: outbits = 199; 199: outbits = 455; 200: outbits = 39; 201: outbits = 295; 202: outbits = 167; 203: outbits = 423; 204: outbits = 103; 205: outbits = 359; 206: outbits = 231; 207: outbits = 487; 208: outbits = 23; 209: outbits = 279; 210: outbits = 151; 211: outbits = 407; 212: outbits = 87; 213: outbits = 343; 214: outbits = 215; 215: outbits = 471; 216: outbits = 55; 217: outbits = 311; 218: outbits = 183; 219: outbits = 439; 220: outbits = 119; 221: outbits = 375; 222: outbits = 247; 223: outbits = 503; 224: outbits = 15; 225: outbits = 271; 226: outbits = 143; 227: outbits = 399; 228: outbits = 79; 229: outbits = 335; 230: outbits = 207; 231: outbits = 463; 232: outbits = 47; 233: outbits = 303; 234: outbits = 175; 235: outbits = 431; 236: outbits = 111; 237: outbits = 367; 238: outbits = 239; 239: outbits = 495; 240: outbits = 31; 241: outbits = 287; 242: outbits = 159; 243: outbits = 415; 244: outbits = 95; 245: outbits = 351; 246: outbits = 223; 247: outbits = 479; 248: outbits = 63; 249: outbits = 319; 250: outbits = 191; 251: outbits = 447; 252: outbits = 127; 253: outbits = 383; 254: outbits = 255; 255: outbits = 511; 256: outbits = 0; 257: outbits = 64; 258: outbits = 32; 259: outbits = 96; 260: outbits = 16; 261: outbits = 80; 262: outbits = 48; 263: outbits = 112; 264: outbits = 8; 265: outbits = 72; 266: outbits = 40; 267: outbits = 104; 268: outbits = 24; 269: outbits = 88; 270: outbits = 56; 271: outbits = 120; 272: outbits = 4; 273: outbits = 68; 274: outbits = 36; 275: outbits = 100; 276: outbits = 20; 277: outbits = 84; 278: outbits = 52; 279: outbits = 116; 280: outbits = 3; 281: outbits = 131; 282: outbits = 67; 283: outbits = 195; 284: outbits = 35; 285: outbits = 163; 286: outbits = 99; default: outbits = 227; endcase $write("EOF BITS:"); $write(" "); $write("%0d", cs_i); $write(" "); $write("%h", outlen); $write(" "); $write("%0d", outbits); $write("\n"); oaddr <= do; obyte <= MYHDL13_put(outbits, outlen); MYHDL14_put_adv(outbits, outlen); end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 2))) begin $write("calc end adler"); $write("\n"); adler2 <= ((adler2 + ladler1) % 65521); if ((doo != 0)) begin oaddr <= do; obyte <= ob1; do <= (do + 1); end end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 3))) begin $write("c1"); $write("\n"); oaddr <= do; obyte <= (adler2 >>> 8); do <= (do + 1); o_oprogress <= (do + 1); end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 4))) begin $write("c2"); $write("\n"); oaddr <= do; obyte <= (adler2 & 255); do <= (do + 1); o_oprogress <= (do + 1); end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 5))) begin $write("c3"); $write("\n"); oaddr <= do; obyte <= (adler1 >>> 8); do <= (do + 1); o_oprogress <= (do + 1); end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 6))) begin $write("c4"); $write("\n"); oaddr <= do; obyte <= (adler1 & 255); o_oprogress <= (do + 1); end else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 7))) begin $write("EOF finish"); $write(" "); $write("%h", do); $write("\n"); o_done <= 1'b1; state <= 5'b00000; end else begin $write("%h", cur_cstatic); $write(" "); $write("%h", isize); $write("\n"); $finish; end end else begin bdata = iram[(di & 63)]; o_iprogress <= di; adler1_next = ((adler1 + bdata) % 65521); adler1 <= adler1_next; adler2 <= ((adler2 + ladler1) % 65521); ladler1 <= adler1_next; state <= 5'b10111; cur_search <= (di - 1); end if ((!no_adv)) begin cur_cstatic <= (cur_cstatic + 1); end end 5'b11001: begin if ((!1'b1)) begin // pass end else if (flush) begin MYHDL15_do_flush; end else if ((cur_i == 1024)) begin lencode = (length + 254); outlen = codeLength[lencode]; case (lencode) 0: outbits = 12; 1: outbits = 140; 2: outbits = 76; 3: outbits = 204; 4: outbits = 44; 5: outbits = 172; 6: outbits = 108; 7: outbits = 236; 8: outbits = 28; 9: outbits = 156; 10: outbits = 92; 11: outbits = 220; 12: outbits = 60; 13: outbits = 188; 14: outbits = 124; 15: outbits = 252; 16: outbits = 2; 17: outbits = 130; 18: outbits = 66; 19: outbits = 194; 20: outbits = 34; 21: outbits = 162; 22: outbits = 98; 23: outbits = 226; 24: outbits = 18; 25: outbits = 146; 26: outbits = 82; 27: outbits = 210; 28: outbits = 50; 29: outbits = 178; 30: outbits = 114; 31: outbits = 242; 32: outbits = 10; 33: outbits = 138; 34: outbits = 74; 35: outbits = 202; 36: outbits = 42; 37: outbits = 170; 38: outbits = 106; 39: outbits = 234; 40: outbits = 26; 41: outbits = 154; 42: outbits = 90; 43: outbits = 218; 44: outbits = 58; 45: outbits = 186; 46: outbits = 122; 47: outbits = 250; 48: outbits = 6; 49: outbits = 134; 50: outbits = 70; 51: outbits = 198; 52: outbits = 38; 53: outbits = 166; 54: outbits = 102; 55: outbits = 230; 56: outbits = 22; 57: outbits = 150; 58: outbits = 86; 59: outbits = 214; 60: outbits = 54; 61: outbits = 182; 62: outbits = 118; 63: outbits = 246; 64: outbits = 14; 65: outbits = 142; 66: outbits = 78; 67: outbits = 206; 68: outbits = 46; 69: outbits = 174; 70: outbits = 110; 71: outbits = 238; 72: outbits = 30; 73: outbits = 158; 74: outbits = 94; 75: outbits = 222; 76: outbits = 62; 77: outbits = 190; 78: outbits = 126; 79: outbits = 254; 80: outbits = 1; 81: outbits = 129; 82: outbits = 65; 83: outbits = 193; 84: outbits = 33; 85: outbits = 161; 86: outbits = 97; 87: outbits = 225; 88: outbits = 17; 89: outbits = 145; 90: outbits = 81; 91: outbits = 209; 92: outbits = 49; 93: outbits = 177; 94: outbits = 113; 95: outbits = 241; 96: outbits = 9; 97: outbits = 137; 98: outbits = 73; 99: outbits = 201; 100: outbits = 41; 101: outbits = 169; 102: outbits = 105; 103: outbits = 233; 104: outbits = 25; 105: outbits = 153; 106: outbits = 89; 107: outbits = 217; 108: outbits = 57; 109: outbits = 185; 110: outbits = 121; 111: outbits = 249; 112: outbits = 5; 113: outbits = 133; 114: outbits = 69; 115: outbits = 197; 116: outbits = 37; 117: outbits = 165; 118: outbits = 101; 119: outbits = 229; 120: outbits = 21; 121: outbits = 149; 122: outbits = 85; 123: outbits = 213; 124: outbits = 53; 125: outbits = 181; 126: outbits = 117; 127: outbits = 245; 128: outbits = 13; 129: outbits = 141; 130: outbits = 77; 131: outbits = 205; 132: outbits = 45; 133: outbits = 173; 134: outbits = 109; 135: outbits = 237; 136: outbits = 29; 137: outbits = 157; 138: outbits = 93; 139: outbits = 221; 140: outbits = 61; 141: outbits = 189; 142: outbits = 125; 143: outbits = 253; 144: outbits = 19; 145: outbits = 275; 146: outbits = 147; 147: outbits = 403; 148: outbits = 83; 149: outbits = 339; 150: outbits = 211; 151: outbits = 467; 152: outbits = 51; 153: outbits = 307; 154: outbits = 179; 155: outbits = 435; 156: outbits = 115; 157: outbits = 371; 158: outbits = 243; 159: outbits = 499; 160: outbits = 11; 161: outbits = 267; 162: outbits = 139; 163: outbits = 395; 164: outbits = 75; 165: outbits = 331; 166: outbits = 203; 167: outbits = 459; 168: outbits = 43; 169: outbits = 299; 170: outbits = 171; 171: outbits = 427; 172: outbits = 107; 173: outbits = 363; 174: outbits = 235; 175: outbits = 491; 176: outbits = 27; 177: outbits = 283; 178: outbits = 155; 179: outbits = 411; 180: outbits = 91; 181: outbits = 347; 182: outbits = 219; 183: outbits = 475; 184: outbits = 59; 185: outbits = 315; 186: outbits = 187; 187: outbits = 443; 188: outbits = 123; 189: outbits = 379; 190: outbits = 251; 191: outbits = 507; 192: outbits = 7; 193: outbits = 263; 194: outbits = 135; 195: outbits = 391; 196: outbits = 71; 197: outbits = 327; 198: outbits = 199; 199: outbits = 455; 200: outbits = 39; 201: outbits = 295; 202: outbits = 167; 203: outbits = 423; 204: outbits = 103; 205: outbits = 359; 206: outbits = 231; 207: outbits = 487; 208: outbits = 23; 209: outbits = 279; 210: outbits = 151; 211: outbits = 407; 212: outbits = 87; 213: outbits = 343; 214: outbits = 215; 215: outbits = 471; 216: outbits = 55; 217: outbits = 311; 218: outbits = 183; 219: outbits = 439; 220: outbits = 119; 221: outbits = 375; 222: outbits = 247; 223: outbits = 503; 224: outbits = 15; 225: outbits = 271; 226: outbits = 143; 227: outbits = 399; 228: outbits = 79; 229: outbits = 335; 230: outbits = 207; 231: outbits = 463; 232: outbits = 47; 233: outbits = 303; 234: outbits = 175; 235: outbits = 431; 236: outbits = 111; 237: outbits = 367; 238: outbits = 239; 239: outbits = 495; 240: outbits = 31; 241: outbits = 287; 242: outbits = 159; 243: outbits = 415; 244: outbits = 95; 245: outbits = 351; 246: outbits = 223; 247: outbits = 479; 248: outbits = 63; 249: outbits = 319; 250: outbits = 191; 251: outbits = 447; 252: outbits = 127; 253: outbits = 383; 254: outbits = 255; 255: outbits = 511; 256: outbits = 0; 257: outbits = 64; 258: outbits = 32; 259: outbits = 96; 260: outbits = 16; 261: outbits = 80; 262: outbits = 48; 263: outbits = 112; 264: outbits = 8; 265: outbits = 72; 266: outbits = 40; 267: outbits = 104; 268: outbits = 24; 269: outbits = 88; 270: outbits = 56; 271: outbits = 120; 272: outbits = 4; 273: outbits = 68; 274: outbits = 36; 275: outbits = 100; 276: outbits = 20; 277: outbits = 84; 278: outbits = 52; 279: outbits = 116; 280: outbits = 3; 281: outbits = 131; 282: outbits = 67; 283: outbits = 195; 284: outbits = 35; 285: outbits = 163; 286: outbits = 99; default: outbits = 227; endcase oaddr <= do; obyte <= MYHDL16_put(outbits, outlen); MYHDL17_put_adv(outbits, outlen); cur_i <= 0; end else begin case ((cur_i + 1)) 0: nextdist = 1; 1: nextdist = 2; 2: nextdist = 3; 3: nextdist = 4; 4: nextdist = 5; 5: nextdist = 7; 6: nextdist = 9; 7: nextdist = 13; 8: nextdist = 17; 9: nextdist = 25; 10: nextdist = 33; 11: nextdist = 49; 12: nextdist = 65; 13: nextdist = 97; 14: nextdist = 129; 15: nextdist = 193; 16: nextdist = 257; 17: nextdist = 385; 18: nextdist = 513; 19: nextdist = 769; 20: nextdist = 1025; 21: nextdist = 1537; 22: nextdist = 2049; 23: nextdist = 3073; 24: nextdist = 4097; 25: nextdist = 6145; 26: nextdist = 8193; 27: nextdist = 12289; 28: nextdist = 16385; default: nextdist = 24577; endcase if ((nextdist > cur_dist)) begin case (cur_i) 0: copydist = 1; 1: copydist = 2; 2: copydist = 3; 3: copydist = 4; 4: copydist = 5; 5: copydist = 7; 6: copydist = 9; 7: copydist = 13; 8: copydist = 17; 9: copydist = 25; 10: copydist = 33; 11: copydist = 49; 12: copydist = 65; 13: copydist = 97; 14: copydist = 129; 15: copydist = 193; 16: copydist = 257; 17: copydist = 385; 18: copydist = 513; 19: copydist = 769; 20: copydist = 1025; 21: copydist = 1537; 22: copydist = 2049; 23: copydist = 3073; 24: copydist = 4097; 25: copydist = 6145; 26: copydist = 8193; 27: copydist = 12289; 28: copydist = 16385; default: copydist = 24577; endcase extra_dist = (cur_dist - copydist); case ((cur_i / 2)) 0: extra_bits = 0; 1: extra_bits = 0; 2: extra_bits = 1; 3: extra_bits = 2; 4: extra_bits = 3; 5: extra_bits = 4; 6: extra_bits = 5; 7: extra_bits = 6; 8: extra_bits = 7; 9: extra_bits = 8; 10: extra_bits = 9; 11: extra_bits = 10; 12: extra_bits = 11; 13: extra_bits = 12; default: extra_bits = 13; endcase if ((extra_dist > ((1 << extra_bits) - 1))) begin $finish; end outcode = (MYHDL18_rev_bits(cur_i, 5) | (extra_dist << 5)); oaddr <= do; obyte <= MYHDL19_put(outcode, (5 + extra_bits)); MYHDL20_put_adv(outcode, (5 + extra_bits)); cur_i <= (($signed({1'b0, di}) - $signed({1'b0, length})) + 1); state <= 5'b11010; end else begin cur_i <= (cur_i + 1); end end end 5'b11010: begin if ((!1'b1)) begin // pass end else if ((cur_i < di)) begin bdata = iram[(cur_i & 63)]; adler1_next = ((adler1 + bdata) % 65521); adler1 <= adler1_next; adler2 <= ((adler2 + ladler1) % 65521); ladler1 <= adler1_next; cur_i <= (cur_i + 1); end else begin state <= 5'b10110; end end 5'b11000: begin if ((1'b1 && 1'b1)) begin lfmatch = length; distance = (lfmatch + 1); fmatch2 = (($signed({1'b0, di}) - $signed({1'b0, lfmatch})) + 2); lencode = 257; match = 3; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 4)) && (iram[(fmatch2 & 63)] == b4))) begin lencode = 258; match = 4; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 5)) && (iram[((fmatch2 + 1) & 63)] == b5))) begin lencode = 259; match = 5; if ((1'b1 && ($signed({1'b0, di}) < ($signed({1'b0, isize}) - 6)) && (iram[((fmatch2 + 2) & 63)] == b6))) begin lencode = 260; match = 6; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 7)) && (iram[((fmatch2 + 3) & 63)] == b7))) begin lencode = 261; match = 7; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 8)) && (iram[((fmatch2 + 4) & 63)] == b8))) begin lencode = 262; match = 8; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 9)) && (iram[((fmatch2 + 5) & 63)] == b9))) begin lencode = 263; match = 9; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 10)) && (iram[((fmatch2 + 6) & 63)] == b10))) begin lencode = 264; match = 10; end end end end end end end cur_dist <= distance; cur_i <= 1024; di <= (di + match); cur_cstatic <= ((cur_cstatic + match) - 1); length <= match; state <= 5'b11001; end end 5'b10111: begin if ((!1'b1)) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else begin if (((cur_search >= 0) && (cur_search >= ($signed({1'b0, di}) - 32)) && ($signed({1'b0, di}) < ($signed({1'b0, isize}) - 3)))) begin if (1'b1) begin found = 0; fmatch = 0; begin: MYHDL21_BREAK for (si=0; si<32; si=si+1) begin if (smatch[si]) begin fmatch = si; found = 1; disable MYHDL21_BREAK; end end end if (((!found) || ((($signed({1'b0, di}) - fmatch) - 1) < 0))) begin cur_search <= (-1); end else begin length <= fmatch; state <= 5'b11000; end end else if (((!1'b1) && (iram[(cur_search & 63)] == b1) && (iram[((cur_search + 1) & 63)] == b2) && (iram[((cur_search + 2) & 63)] == b3))) begin lencode = 257; match = 3; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 4)) && (iram[((cur_search + 3) & 63)] == b4))) begin lencode = 258; match = 4; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 5)) && (iram[((cur_search + 4) & 63)] == b5))) begin lencode = 259; match = 5; if ((1'b1 && ($signed({1'b0, di}) < ($signed({1'b0, isize}) - 6)) && (iram[((cur_search + 5) & 63)] == b6))) begin lencode = 260; match = 6; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 7)) && (iram[((cur_search + 6) & 63)] == b7))) begin lencode = 261; match = 7; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 8)) && (iram[((cur_search + 7) & 63)] == b8))) begin lencode = 262; match = 8; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 9)) && (iram[((cur_search + 8) & 63)] == b9))) begin lencode = 263; match = 9; if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 10)) && (iram[((cur_search + 9) & 63)] == b10))) begin lencode = 264; match = 10; end end end end end end end distance = ($signed({1'b0, di}) - cur_search); cur_dist <= distance; cur_i <= 1024; di <= (di + match); cur_cstatic <= ((cur_cstatic + match) - 1); length <= match; state <= 5'b11001; end else begin cur_search <= (cur_search - 1); end end else begin bdata = b1; di <= (di + 1); outlen = codeLength[bdata]; case (bdata) 0: outbits = 12; 1: outbits = 140; 2: outbits = 76; 3: outbits = 204; 4: outbits = 44; 5: outbits = 172; 6: outbits = 108; 7: outbits = 236; 8: outbits = 28; 9: outbits = 156; 10: outbits = 92; 11: outbits = 220; 12: outbits = 60; 13: outbits = 188; 14: outbits = 124; 15: outbits = 252; 16: outbits = 2; 17: outbits = 130; 18: outbits = 66; 19: outbits = 194; 20: outbits = 34; 21: outbits = 162; 22: outbits = 98; 23: outbits = 226; 24: outbits = 18; 25: outbits = 146; 26: outbits = 82; 27: outbits = 210; 28: outbits = 50; 29: outbits = 178; 30: outbits = 114; 31: outbits = 242; 32: outbits = 10; 33: outbits = 138; 34: outbits = 74; 35: outbits = 202; 36: outbits = 42; 37: outbits = 170; 38: outbits = 106; 39: outbits = 234; 40: outbits = 26; 41: outbits = 154; 42: outbits = 90; 43: outbits = 218; 44: outbits = 58; 45: outbits = 186; 46: outbits = 122; 47: outbits = 250; 48: outbits = 6; 49: outbits = 134; 50: outbits = 70; 51: outbits = 198; 52: outbits = 38; 53: outbits = 166; 54: outbits = 102; 55: outbits = 230; 56: outbits = 22; 57: outbits = 150; 58: outbits = 86; 59: outbits = 214; 60: outbits = 54; 61: outbits = 182; 62: outbits = 118; 63: outbits = 246; 64: outbits = 14; 65: outbits = 142; 66: outbits = 78; 67: outbits = 206; 68: outbits = 46; 69: outbits = 174; 70: outbits = 110; 71: outbits = 238; 72: outbits = 30; 73: outbits = 158; 74: outbits = 94; 75: outbits = 222; 76: outbits = 62; 77: outbits = 190; 78: outbits = 126; 79: outbits = 254; 80: outbits = 1; 81: outbits = 129; 82: outbits = 65; 83: outbits = 193; 84: outbits = 33; 85: outbits = 161; 86: outbits = 97; 87: outbits = 225; 88: outbits = 17; 89: outbits = 145; 90: outbits = 81; 91: outbits = 209; 92: outbits = 49; 93: outbits = 177; 94: outbits = 113; 95: outbits = 241; 96: outbits = 9; 97: outbits = 137; 98: outbits = 73; 99: outbits = 201; 100: outbits = 41; 101: outbits = 169; 102: outbits = 105; 103: outbits = 233; 104: outbits = 25; 105: outbits = 153; 106: outbits = 89; 107: outbits = 217; 108: outbits = 57; 109: outbits = 185; 110: outbits = 121; 111: outbits = 249; 112: outbits = 5; 113: outbits = 133; 114: outbits = 69; 115: outbits = 197; 116: outbits = 37; 117: outbits = 165; 118: outbits = 101; 119: outbits = 229; 120: outbits = 21; 121: outbits = 149; 122: outbits = 85; 123: outbits = 213; 124: outbits = 53; 125: outbits = 181; 126: outbits = 117; 127: outbits = 245; 128: outbits = 13; 129: outbits = 141; 130: outbits = 77; 131: outbits = 205; 132: outbits = 45; 133: outbits = 173; 134: outbits = 109; 135: outbits = 237; 136: outbits = 29; 137: outbits = 157; 138: outbits = 93; 139: outbits = 221; 140: outbits = 61; 141: outbits = 189; 142: outbits = 125; 143: outbits = 253; 144: outbits = 19; 145: outbits = 275; 146: outbits = 147; 147: outbits = 403; 148: outbits = 83; 149: outbits = 339; 150: outbits = 211; 151: outbits = 467; 152: outbits = 51; 153: outbits = 307; 154: outbits = 179; 155: outbits = 435; 156: outbits = 115; 157: outbits = 371; 158: outbits = 243; 159: outbits = 499; 160: outbits = 11; 161: outbits = 267; 162: outbits = 139; 163: outbits = 395; 164: outbits = 75; 165: outbits = 331; 166: outbits = 203; 167: outbits = 459; 168: outbits = 43; 169: outbits = 299; 170: outbits = 171; 171: outbits = 427; 172: outbits = 107; 173: outbits = 363; 174: outbits = 235; 175: outbits = 491; 176: outbits = 27; 177: outbits = 283; 178: outbits = 155; 179: outbits = 411; 180: outbits = 91; 181: outbits = 347; 182: outbits = 219; 183: outbits = 475; 184: outbits = 59; 185: outbits = 315; 186: outbits = 187; 187: outbits = 443; 188: outbits = 123; 189: outbits = 379; 190: outbits = 251; 191: outbits = 507; 192: outbits = 7; 193: outbits = 263; 194: outbits = 135; 195: outbits = 391; 196: outbits = 71; 197: outbits = 327; 198: outbits = 199; 199: outbits = 455; 200: outbits = 39; 201: outbits = 295; 202: outbits = 167; 203: outbits = 423; 204: outbits = 103; 205: outbits = 359; 206: outbits = 231; 207: outbits = 487; 208: outbits = 23; 209: outbits = 279; 210: outbits = 151; 211: outbits = 407; 212: outbits = 87; 213: outbits = 343; 214: outbits = 215; 215: outbits = 471; 216: outbits = 55; 217: outbits = 311; 218: outbits = 183; 219: outbits = 439; 220: outbits = 119; 221: outbits = 375; 222: outbits = 247; 223: outbits = 503; 224: outbits = 15; 225: outbits = 271; 226: outbits = 143; 227: outbits = 399; 228: outbits = 79; 229: outbits = 335; 230: outbits = 207; 231: outbits = 463; 232: outbits = 47; 233: outbits = 303; 234: outbits = 175; 235: outbits = 431; 236: outbits = 111; 237: outbits = 367; 238: outbits = 239; 239: outbits = 495; 240: outbits = 31; 241: outbits = 287; 242: outbits = 159; 243: outbits = 415; 244: outbits = 95; 245: outbits = 351; 246: outbits = 223; 247: outbits = 479; 248: outbits = 63; 249: outbits = 319; 250: outbits = 191; 251: outbits = 447; 252: outbits = 127; 253: outbits = 383; 254: outbits = 255; 255: outbits = 511; 256: outbits = 0; 257: outbits = 64; 258: outbits = 32; 259: outbits = 96; 260: outbits = 16; 261: outbits = 80; 262: outbits = 48; 263: outbits = 112; 264: outbits = 8; 265: outbits = 72; 266: outbits = 40; 267: outbits = 104; 268: outbits = 24; 269: outbits = 88; 270: outbits = 56; 271: outbits = 120; 272: outbits = 4; 273: outbits = 68; 274: outbits = 36; 275: outbits = 100; 276: outbits = 20; 277: outbits = 84; 278: outbits = 52; 279: outbits = 116; 280: outbits = 3; 281: outbits = 131; 282: outbits = 67; 283: outbits = 195; 284: outbits = 35; 285: outbits = 163; 286: outbits = 99; default: outbits = 227; endcase oaddr <= do; obyte <= MYHDL23_put(outbits, outlen); MYHDL24_put_adv(outbits, outlen); state <= 5'b10110; end end end 5'b01110: begin for (stat_i=0; stat_i<144; stat_i=stat_i+1) begin codeLength[stat_i] <= 8; end for (stat_i=144; stat_i<256; stat_i=stat_i+1) begin codeLength[stat_i] <= 9; end for (stat_i=256; stat_i<280; stat_i=stat_i+1) begin codeLength[stat_i] <= 7; end for (stat_i=280; stat_i<288; stat_i=stat_i+1) begin codeLength[stat_i] <= 8; end numCodeLength <= 288; if (do_compress) begin state <= 5'b10110; end else begin cur_HF1 <= 0; state <= 5'b00111; end end 5'b00010: begin if (((!1'b1) || (!1'b0))) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((numLiterals == 0)) begin $write("%h", di); $write(" "); $write("%h", isize); $write("\n"); numLiterals <= (257 + MYHDL33_get4(0, 5)); $write("NL:"); $write(" "); $write("%0d", (257 + MYHDL34_get4(0, 5))); $write("\n"); numDistance <= (1 + MYHDL35_get4(5, 5)); $write("ND:"); $write(" "); $write("%0d", (1 + MYHDL36_get4(5, 5))); $write("\n"); b_numCodeLength <= (4 + MYHDL37_get4(10, 4)); $write("NCL:"); $write(" "); $write("%0d", (4 + MYHDL38_get4(10, 4))); $write("\n"); numCodeLength <= 0; MYHDL39_adv(14); end else begin if ((numCodeLength < 19)) begin case (numCodeLength) 0: clo_i = 16; 1: clo_i = 17; 2: clo_i = 18; 3: clo_i = 0; 4: clo_i = 8; 5: clo_i = 7; 6: clo_i = 9; 7: clo_i = 6; 8: clo_i = 10; 9: clo_i = 5; 10: clo_i = 11; 11: clo_i = 4; 12: clo_i = 12; 13: clo_i = 3; 14: clo_i = 13; 15: clo_i = 2; 16: clo_i = 14; 17: clo_i = 1; default: clo_i = 15; endcase if ((numCodeLength < b_numCodeLength)) begin codeLength[clo_i] <= MYHDL40_get4(0, 3); MYHDL41_adv(3); end else begin codeLength[clo_i] <= 0; end numCodeLength <= (numCodeLength + 1); end else begin numCodeLength <= 19; cur_HF1 <= 0; state <= 5'b00111; end end end 5'b00011: begin if (((!1'b1) || (!1'b0))) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((numCodeLength < (numLiterals + numDistance))) begin n_adv = 0; if ((code < 16)) begin howOften <= 1; lastToken <= code; end else if ((code == 16)) begin howOften <= (3 + MYHDL42_get4(0, 2)); n_adv = 2; end else if ((code == 17)) begin howOften <= (3 + MYHDL43_get4(0, 3)); lastToken <= 0; n_adv = 3; end else if ((code == 18)) begin howOften <= (11 + MYHDL44_get4(0, 7)); lastToken <= 0; n_adv = 7; end else begin $finish; end if ((n_adv != 0)) begin MYHDL45_adv(n_adv); end state <= 5'b00100; end else begin $write("FILL UP"); $write("\n"); for (dbl_i=0; dbl_i<32; dbl_i=dbl_i+1) begin dbl = 0; if (((dbl_i + $signed({1'b0, numLiterals})) < numCodeLength)) begin dbl = codeLength[(dbl_i + $signed({1'b0, numLiterals}))]; end distanceLength[dbl_i] <= dbl; end cur_i <= numLiterals; state <= 5'b00110; end end 5'b00110: begin if ((!1'b1)) begin // pass end else if ((cur_i < 320)) begin codeLength[cur_i] <= 0; cur_i <= (cur_i + 1); end else begin method <= 3; cur_HF1 <= 0; state <= 5'b00111; end end 5'b00101: begin if ((1'b1 && 1'b0)) begin $write("DISTTREE"); $write("\n"); for (dist_i=0; dist_i<32; dist_i=dist_i+1) begin codeLength[dist_i] <= distanceLength[dist_i]; end numCodeLength <= 32; method <= 4; cur_HF1 <= 0; state <= 5'b00111; end end 5'b00100: begin if ((!1'b1)) begin // pass end else if ((howOften != 0)) begin codeLength[numCodeLength] <= lastToken; howOften <= (howOften - 1); numCodeLength <= (numCodeLength + 1); end else if ((numCodeLength < (numLiterals + numDistance))) begin cur_next <= 0; state <= 5'b10011; end else begin state <= 5'b00011; end end 5'b00111: begin if (1'b1) begin if ((cur_HF1 < 16)) begin bitLengthCount[cur_HF1] <= 0; end if (((cur_HF1 < 1) && 1'b0)) begin d_leaves[cur_HF1] <= 0; end if (((method != 4) && (cur_HF1 < 512))) begin lwaddr <= cur_HF1; wleaf <= 0; end limit = 512; if (((method == 4) && 1'b0)) begin limit = 1; end if ((cur_HF1 < limit)) begin cur_HF1 <= (cur_HF1 + 1); end else begin $write("DID HF1 INIT"); $write("\n"); cur_i <= 0; state <= 5'b01000; end end end 5'b01000: begin if ((!1'b1)) begin // pass end else if ((cur_i < numCodeLength)) begin j = codeLength[cur_i]; bitLengthCount[j] <= (bitLengthCount[j] + 1); cur_i <= (cur_i + 1); end else begin bitLengthCount[0] <= 0; state <= 5'b01001; cur_i <= 1; if ((method == 4)) begin d_maxBits <= 0; end else begin maxBits <= 0; end minBits <= 15; end end 5'b01001: begin if ((!1'b1)) begin // pass end else if ((cur_i <= 15)) begin if ((bitLengthCount[cur_i] != 0)) begin if ((cur_i < minBits)) begin minBits <= cur_i; end if ((method == 4)) begin if ((cur_i > d_maxBits)) begin d_maxBits <= cur_i; end end else begin if ((cur_i > maxBits)) begin maxBits <= cur_i; end end end cur_i <= (cur_i + 1); end else begin $write("%h", minBits); $write(" "); $write("%h", maxBits); $write("\n"); t = 10; if (((method == 4) && 1'b0)) begin if ((t > d_maxBits)) begin t = d_maxBits; end d_instantMaxBit <= t; d_instantMask <= ((1 << t) - 1); end else begin if ((t > maxBits)) begin t = maxBits; end instantMaxBit <= t; instantMask <= ((1 << t) - 1); end $write("%0d", ((1 << t) - 1)); $write("\n"); state <= 5'b01010; cur_i <= minBits; code <= 0; for (hf2_i=0; hf2_i<16; hf2_i=hf2_i+1) begin nextCode[hf2_i] <= 0; end $write("to HF3"); $write("\n"); end end 5'b01010: begin if (1'b1) begin amb = maxBits; if (((method == 4) && 1'b0)) begin amb = d_maxBits; end if ((cur_i <= amb)) begin ncode = ((code + bitLengthCount[($signed({1'b0, cur_i}) - 1)]) << 1); code <= ncode; nextCode[cur_i] <= ncode; cur_i <= (cur_i + 1); end else begin state <= 5'b01011; cur_i <= 0; spread_i <= 0; $write("to HF4"); $write("\n"); end end end 5'b01100: begin if (1'b1) begin canonical = nextCode[bits]; nextCode[bits] <= (nextCode[bits] + 1); if ((bits > 15)) begin $finish; end reverse <= MYHDL52_rev_bits(canonical, bits); leaf <= MYHDL53_makeLeaf(spread_i, bits); state <= 5'b01101; end end 5'b01101: begin if ((!1'b1)) begin // pass end else if (((method == 4) && 1'b0)) begin d_leaves[reverse] <= leaf; if ((bits <= d_instantMaxBit)) begin if (((reverse + (1 << bits)) <= d_instantMask)) begin step <= (1 << bits); spread <= (reverse + (1 << bits)); state <= 5'b10010; end else begin spread_i <= (spread_i + 1); state <= 5'b01011; end end else begin state <= 5'b01011; spread_i <= (spread_i + 1); end end else begin wleaf <= leaf; lwaddr <= reverse; if ((bits <= instantMaxBit)) begin if (((reverse + (1 << bits)) <= instantMask)) begin step <= (1 << bits); spread <= (reverse + (1 << bits)); state <= 5'b10010; end else begin spread_i <= (spread_i + 1); state <= 5'b01011; end end else begin spread_i <= (spread_i + 1); state <= 5'b01011; end end end 5'b01011: begin if ((!1'b1)) begin // pass end else if ((spread_i < numCodeLength)) begin bits_next = codeLength[spread_i]; if ((bits_next != 0)) begin bits <= bits_next; state <= 5'b01100; end else begin spread_i <= (spread_i + 1); end end else begin if (do_compress) begin state <= 5'b10110; cur_cstatic <= 0; end else if (((method == 3) && 1'b0)) begin state <= 5'b00101; end else if (((method == 4) && 1'b0)) begin $write("DEFLATE m2!"); $write("\n"); state <= 5'b10011; end else if (((method == 2) && 1'b0)) begin numCodeLength <= 0; state <= 5'b10011; end else begin state <= 5'b10011; end cur_next <= 0; cur_i <= 0; end end 5'b10010: begin if (1'b1) begin if (((method == 4) && 1'b0)) begin d_leaves[spread] <= MYHDL54_makeLeaf(spread_i, codeLength[spread_i]); end else begin lwaddr <= spread; wleaf <= MYHDL55_makeLeaf(spread_i, codeLength[spread_i]); end aim = instantMask; if (((method == 4) && 1'b0)) begin aim = d_instantMask; end if (($signed({1'b0, spread}) > ($signed({1'b0, aim}) - $signed({1'b0, step})))) begin spread_i <= (spread_i + 1); state <= 5'b01011; end else begin spread <= (spread + step); end end end 5'b10011: begin if ((!1'b1)) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((cur_next == 0)) begin cto = MYHDL56_get4(0, maxBits); mask = ((1 << instantMaxBit) - 1); lraddr <= (cto & mask); filled <= 1'b0; cur_next <= (instantMaxBit + 1); end else if ((MYHDL57_get_bits(rleaf) >= cur_next)) begin $write("CACHE MISS"); $write(" "); $write("%h", cur_next); $write("\n"); cto = MYHDL58_get4(0, maxBits); mask = ((1 << cur_next) - 1); lraddr <= (cto & mask); filled <= 1'b0; cur_next <= (cur_next + 1); end else begin if ((MYHDL59_get_bits(rleaf) < 1)) begin $write("< 1 bits: "); $write("\n"); $finish; end MYHDL61_adv(MYHDL60_get_bits(rleaf)); // if get_code(leaf) == 0: // print("leaf 0", di, isize) code <= MYHDL62_get_code(rleaf); if (((method == 2) && 1'b0)) begin state <= 5'b00011; end else begin state <= 5'b10100; end end end 5'b01111: begin if (((!1'b1) || (!1'b0))) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((cur_next == 0)) begin if ((d_instantMaxBit > 10)) begin $finish; end token = (code - 257); case (token) 0: extraLength = 0; 1: extraLength = 0; 2: extraLength = 0; 3: extraLength = 0; 4: extraLength = 0; 5: extraLength = 0; 6: extraLength = 0; 7: extraLength = 0; 8: extraLength = 1; 9: extraLength = 1; 10: extraLength = 1; 11: extraLength = 1; 12: extraLength = 2; 13: extraLength = 2; 14: extraLength = 2; 15: extraLength = 2; 16: extraLength = 3; 17: extraLength = 3; 18: extraLength = 3; 19: extraLength = 3; 20: extraLength = 4; 21: extraLength = 4; 22: extraLength = 4; 23: extraLength = 4; 24: extraLength = 5; 25: extraLength = 5; 26: extraLength = 5; 27: extraLength = 5; default: extraLength = 0; endcase cto = MYHDL63_get4(extraLength, d_maxBits); mask = ((1 << d_instantMaxBit) - 1); leaf <= d_leaves[(cto & mask)]; cur_next <= (instantMaxBit + 1); end else if ((MYHDL64_get_bits(leaf) >= cur_next)) begin $write("DCACHE MISS"); $write(" "); $write("%h", cur_next); $write("\n"); token = (code - 257); case (token) 0: extraLength = 0; 1: extraLength = 0; 2: extraLength = 0; 3: extraLength = 0; 4: extraLength = 0; 5: extraLength = 0; 6: extraLength = 0; 7: extraLength = 0; 8: extraLength = 1; 9: extraLength = 1; 10: extraLength = 1; 11: extraLength = 1; 12: extraLength = 2; 13: extraLength = 2; 14: extraLength = 2; 15: extraLength = 2; 16: extraLength = 3; 17: extraLength = 3; 18: extraLength = 3; 19: extraLength = 3; 20: extraLength = 4; 21: extraLength = 4; 22: extraLength = 4; 23: extraLength = 4; 24: extraLength = 5; 25: extraLength = 5; 26: extraLength = 5; 27: extraLength = 5; default: extraLength = 0; endcase cto = MYHDL65_get4(extraLength, d_maxBits); mask = ((1 << cur_next) - 1); leaf <= d_leaves[(cto & mask)]; cur_next <= (cur_next + 1); end else begin state <= 5'b10000; end end 5'b10000: begin if ((1'b1 && 1'b0)) begin if ((MYHDL66_get_bits(leaf) == 0)) begin $finish; end token = (code - 257); case (token) 0: tlength = 3; 1: tlength = 4; 2: tlength = 5; 3: tlength = 6; 4: tlength = 7; 5: tlength = 8; 6: tlength = 9; 7: tlength = 10; 8: tlength = 11; 9: tlength = 13; 10: tlength = 15; 11: tlength = 17; 12: tlength = 19; 13: tlength = 23; 14: tlength = 27; 15: tlength = 31; 16: tlength = 35; 17: tlength = 43; 18: tlength = 51; 19: tlength = 59; 20: tlength = 67; 21: tlength = 83; 22: tlength = 99; 23: tlength = 115; 24: tlength = 131; 25: tlength = 163; 26: tlength = 195; 27: tlength = 227; default: tlength = 258; endcase case (token) 0: extraLength = 0; 1: extraLength = 0; 2: extraLength = 0; 3: extraLength = 0; 4: extraLength = 0; 5: extraLength = 0; 6: extraLength = 0; 7: extraLength = 0; 8: extraLength = 1; 9: extraLength = 1; 10: extraLength = 1; 11: extraLength = 1; 12: extraLength = 2; 13: extraLength = 2; 14: extraLength = 2; 15: extraLength = 2; 16: extraLength = 3; 17: extraLength = 3; 18: extraLength = 3; 19: extraLength = 3; 20: extraLength = 4; 21: extraLength = 4; 22: extraLength = 4; 23: extraLength = 4; 24: extraLength = 5; 25: extraLength = 5; 26: extraLength = 5; 27: extraLength = 5; default: extraLength = 0; endcase tlength = tlength + MYHDL67_get4(0, extraLength); distanceCode = MYHDL68_get_code(leaf); case (distanceCode) 0: distance = 1; 1: distance = 2; 2: distance = 3; 3: distance = 4; 4: distance = 5; 5: distance = 7; 6: distance = 9; 7: distance = 13; 8: distance = 17; 9: distance = 25; 10: distance = 33; 11: distance = 49; 12: distance = 65; 13: distance = 97; 14: distance = 129; 15: distance = 193; 16: distance = 257; 17: distance = 385; 18: distance = 513; 19: distance = 769; 20: distance = 1025; 21: distance = 1537; 22: distance = 2049; 23: distance = 3073; 24: distance = 4097; 25: distance = 6145; 26: distance = 8193; 27: distance = 12289; 28: distance = 16385; default: distance = 24577; endcase case ($signed(distanceCode >>> 1)) 0: moreBits = 0; 1: moreBits = 0; 2: moreBits = 1; 3: moreBits = 2; 4: moreBits = 3; 5: moreBits = 4; 6: moreBits = 5; 7: moreBits = 6; 8: moreBits = 7; 9: moreBits = 8; 10: moreBits = 9; 11: moreBits = 10; 12: moreBits = 11; 13: moreBits = 12; default: moreBits = 13; endcase mored = MYHDL70_get4((extraLength + MYHDL69_get_bits(leaf)), moreBits); distance = distance + mored; if ((distance > $signed({1'b0, do}))) begin $write("%0d", distance); $write(" "); $write("%h", do); $write("\n"); $finish; end MYHDL72_adv(((moreBits + extraLength) + MYHDL71_get_bits(leaf))); offset <= (($signed({1'b0, do}) - distance) & 32767); length <= tlength; cur_i <= 0; oraddr <= ($signed({1'b0, do}) - distance); state <= 5'b10101; end end 5'b10100: begin if ((!1'b1)) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if ((($signed({1'b0, di}) >= ($signed({1'b0, isize}) - 4)) && (!(i_mode == 0)))) begin // pass end else if ((do >= (i_raddr + 32768))) begin // pass end else if (($signed({1'b0, di}) > ($signed({1'b0, isize}) - 3))) begin state <= 5'b00000; o_done <= 1'b1; $write("NO EOF "); $write(" "); $write("%h", di); $write("\n"); $finish; end else if ((code == 256)) begin $write("EOF:"); $write(" "); $write("%h", di); $write(" "); $write("%h", do); $write("\n"); if ((!final)) begin state <= 5'b00001; filled <= 1'b0; $write("New Block!"); $write("\n"); end else begin o_done <= 1'b1; state <= 5'b00000; end end else begin if ((code < 256)) begin oaddr <= do; obyte <= code; o_oprogress <= (do + 1); do <= (do + 1); cur_next <= 0; state <= 5'b10011; end else if ((code == 300)) begin $finish; end else begin if (static) begin token = (code - 257); case (token) 0: tlength = 3; 1: tlength = 4; 2: tlength = 5; 3: tlength = 6; 4: tlength = 7; 5: tlength = 8; 6: tlength = 9; 7: tlength = 10; 8: tlength = 11; 9: tlength = 13; 10: tlength = 15; 11: tlength = 17; 12: tlength = 19; 13: tlength = 23; 14: tlength = 27; 15: tlength = 31; 16: tlength = 35; 17: tlength = 43; 18: tlength = 51; 19: tlength = 59; 20: tlength = 67; 21: tlength = 83; 22: tlength = 99; 23: tlength = 115; 24: tlength = 131; 25: tlength = 163; 26: tlength = 195; 27: tlength = 227; default: tlength = 258; endcase case (token) 0: extraLength = 0; 1: extraLength = 0; 2: extraLength = 0; 3: extraLength = 0; 4: extraLength = 0; 5: extraLength = 0; 6: extraLength = 0; 7: extraLength = 0; 8: extraLength = 1; 9: extraLength = 1; 10: extraLength = 1; 11: extraLength = 1; 12: extraLength = 2; 13: extraLength = 2; 14: extraLength = 2; 15: extraLength = 2; 16: extraLength = 3; 17: extraLength = 3; 18: extraLength = 3; 19: extraLength = 3; 20: extraLength = 4; 21: extraLength = 4; 22: extraLength = 4; 23: extraLength = 4; 24: extraLength = 5; 25: extraLength = 5; 26: extraLength = 5; 27: extraLength = 5; default: extraLength = 0; endcase tlength = tlength + MYHDL73_get4(0, extraLength); t = MYHDL74_get4(extraLength, 5); distanceCode = MYHDL75_rev_bits(t, 5); case (distanceCode) 0: distance = 1; 1: distance = 2; 2: distance = 3; 3: distance = 4; 4: distance = 5; 5: distance = 7; 6: distance = 9; 7: distance = 13; 8: distance = 17; 9: distance = 25; 10: distance = 33; 11: distance = 49; 12: distance = 65; 13: distance = 97; 14: distance = 129; 15: distance = 193; 16: distance = 257; 17: distance = 385; 18: distance = 513; 19: distance = 769; 20: distance = 1025; 21: distance = 1537; 22: distance = 2049; 23: distance = 3073; 24: distance = 4097; 25: distance = 6145; 26: distance = 8193; 27: distance = 12289; 28: distance = 16385; default: distance = 24577; endcase case ($signed(distanceCode >>> 1)) 0: moreBits = 0; 1: moreBits = 0; 2: moreBits = 1; 3: moreBits = 2; 4: moreBits = 3; 5: moreBits = 4; 6: moreBits = 5; 7: moreBits = 6; 8: moreBits = 7; 9: moreBits = 8; 10: moreBits = 9; 11: moreBits = 10; 12: moreBits = 11; 13: moreBits = 12; default: moreBits = 13; endcase distance = distance + MYHDL76_get4((extraLength + 5), moreBits); MYHDL77_adv(((extraLength + 5) + moreBits)); offset <= ($signed({1'b0, do}) - distance); length <= tlength; cur_i <= 0; oraddr <= ($signed({1'b0, do}) - distance); state <= 5'b10101; end else begin if ((!1'b0)) begin $write("DYNAMIC mode disabled"); $write("\n"); $finish; end state <= 5'b01111; end end cur_next <= 0; end end 5'b10101: begin if ((!1'b1)) begin // pass end else if ((!filled)) begin filled <= 1'b1; end else if ((nb < 4)) begin // pass end else if (((cur_i == 0) && ((do + length) >= (i_raddr + 32768)))) begin // pass end else if (($signed({1'b0, di}) >= ($signed({1'b0, isize}) - 2))) begin // pass end else if ((method == 0)) begin if ((cur_i < length)) begin oaddr <= do; obyte <= b3; MYHDL78_adv(8); cur_i <= (cur_i + 1); do <= (do + 1); o_oprogress <= (do + 1); end else if ((!final)) begin MYHDL79_adv(16); state <= 5'b00001; filled <= 1'b0; $write("new block"); $write("\n"); end else begin o_done <= 1'b1; state <= 5'b00000; end end else if ((cur_i < (length + 2))) begin oraddr <= (offset + cur_i); if ((cur_i == 1)) begin copy1 <= orbyte; end if ((cur_i == 3)) begin copy2 <= orbyte; end if ((cur_i > 1)) begin if ((((offset + cur_i) & 32767) == ((do + 1) & 32767))) begin obyte <= copy1; end else if (((cur_i == 3) || (((offset + cur_i) & 32767) != (do & 32767)))) begin obyte <= orbyte; end else if ((cur_i > 2)) begin if ((cur_i & 1)) begin obyte <= copy2; end else begin obyte <= copy1; end end else begin obyte <= copy1; end oaddr <= do; o_oprogress <= (do + 1); do <= (do + 1); end cur_i <= (cur_i + 1); end else begin cur_next <= 0; state <= 5'b10011; end end default: begin $write("unknown state?!"); $write("\n"); state <= 5'b00000; end endcase end end always @(posedge clk) begin: DEFLATE_FILL_BUF integer shift; if ((!reset)) begin $write("FILL RESET"); $write("\n"); nb <= 0; b1 <= 0; b2 <= 0; b3 <= 0; b4 <= 0; old_di <= 0; end else begin if ((isize < 4)) begin nb <= 0; old_di <= 0; end else if (((i_mode == 4) || (i_mode == 5))) begin nb <= 0; old_di <= 0; end else begin // if do_compress: // print("FILL", di, old_di, nb, b1, b2, b3, b4) if (1'b1) begin shift = (($signed({1'b0, di}) - $signed({1'b0, old_di})) * 8); // if shift != 0: // print("shift", shift, cwindow, b1, b2, b3, b4) if (1'b1) begin cwindow <= (($signed({1'b0, cwindow}) << shift) | $signed($signed({1'b0, b110}) >>> (80 - shift))); end else begin cwindow <= (($signed({1'b0, cwindow}) << shift) | $signed($signed({1'b0, b15}) >>> (40 - shift))); end end if ((old_di == di)) begin nb <= 4; end old_di <= di; b1 <= iram[(di & 63)]; b2 <= iram[((di + 1) & 63)]; b3 <= iram[((di + 2) & 63)]; b4 <= iram[((di + 3) & 63)]; b5 <= iram[((di + 4) & 63)]; if (1'b1) begin b6 <= iram[((di + 5) & 63)]; b7 <= iram[((di + 6) & 63)]; b8 <= iram[((di + 7) & 63)]; b9 <= iram[((di + 8) & 63)]; b10 <= iram[((di + 9) & 63)]; end end end end always @(posedge clk) begin: DEFLATE_ORAMWRITE oram[oaddr] <= obyte; leaves[lwaddr] <= wleaf; end always @(posedge clk) begin: DEFLATE_ORAMREAD orbyte <= oram[oraddr]; rleaf <= leaves[lraddr]; end assign smatch[0] = ((({cwindow, b1, b2} >>> (8 * 0)) & 16777215) == (b14 >>> 8)); assign smatch[1] = ((({cwindow, b1, b2} >>> (8 * 1)) & 16777215) == (b14 >>> 8)); assign smatch[2] = ((({cwindow, b1, b2} >>> (8 * 2)) & 16777215) == (b14 >>> 8)); assign smatch[3] = ((({cwindow, b1, b2} >>> (8 * 3)) & 16777215) == (b14 >>> 8)); assign smatch[4] = ((({cwindow, b1, b2} >>> (8 * 4)) & 16777215) == (b14 >>> 8)); assign smatch[5] = ((({cwindow, b1, b2} >>> (8 * 5)) & 16777215) == (b14 >>> 8)); assign smatch[6] = ((({cwindow, b1, b2} >>> (8 * 6)) & 16777215) == (b14 >>> 8)); assign smatch[7] = ((({cwindow, b1, b2} >>> (8 * 7)) & 16777215) == (b14 >>> 8)); assign smatch[8] = ((({cwindow, b1, b2} >>> (8 * 8)) & 16777215) == (b14 >>> 8)); assign smatch[9] = ((({cwindow, b1, b2} >>> (8 * 9)) & 16777215) == (b14 >>> 8)); assign smatch[10] = ((({cwindow, b1, b2} >>> (8 * 10)) & 16777215) == (b14 >>> 8)); assign smatch[11] = ((({cwindow, b1, b2} >>> (8 * 11)) & 16777215) == (b14 >>> 8)); assign smatch[12] = ((({cwindow, b1, b2} >>> (8 * 12)) & 16777215) == (b14 >>> 8)); assign smatch[13] = ((({cwindow, b1, b2} >>> (8 * 13)) & 16777215) == (b14 >>> 8)); assign smatch[14] = ((({cwindow, b1, b2} >>> (8 * 14)) & 16777215) == (b14 >>> 8)); assign smatch[15] = ((({cwindow, b1, b2} >>> (8 * 15)) & 16777215) == (b14 >>> 8)); assign smatch[16] = ((({cwindow, b1, b2} >>> (8 * 16)) & 16777215) == (b14 >>> 8)); assign smatch[17] = ((({cwindow, b1, b2} >>> (8 * 17)) & 16777215) == (b14 >>> 8)); assign smatch[18] = ((({cwindow, b1, b2} >>> (8 * 18)) & 16777215) == (b14 >>> 8)); assign smatch[19] = ((({cwindow, b1, b2} >>> (8 * 19)) & 16777215) == (b14 >>> 8)); assign smatch[20] = ((({cwindow, b1, b2} >>> (8 * 20)) & 16777215) == (b14 >>> 8)); assign smatch[21] = ((({cwindow, b1, b2} >>> (8 * 21)) & 16777215) == (b14 >>> 8)); assign smatch[22] = ((({cwindow, b1, b2} >>> (8 * 22)) & 16777215) == (b14 >>> 8)); assign smatch[23] = ((({cwindow, b1, b2} >>> (8 * 23)) & 16777215) == (b14 >>> 8)); assign smatch[24] = ((({cwindow, b1, b2} >>> (8 * 24)) & 16777215) == (b14 >>> 8)); assign smatch[25] = ((({cwindow, b1, b2} >>> (8 * 25)) & 16777215) == (b14 >>> 8)); assign smatch[26] = ((({cwindow, b1, b2} >>> (8 * 26)) & 16777215) == (b14 >>> 8)); assign smatch[27] = ((({cwindow, b1, b2} >>> (8 * 27)) & 16777215) == (b14 >>> 8)); assign smatch[28] = ((({cwindow, b1, b2} >>> (8 * 28)) & 16777215) == (b14 >>> 8)); assign smatch[29] = ((({cwindow, b1, b2} >>> (8 * 29)) & 16777215) == (b14 >>> 8)); assign smatch[30] = ((({cwindow, b1, b2} >>> (8 * 30)) & 16777215) == (b14 >>> 8)); assign smatch[31] = ((({cwindow, b1, b2} >>> (8 * 31)) & 16777215) == (b14 >>> 8)); endmodule