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https://opencores.org/ocsvn/hf-risc/hf-risc/trunk
Subversion Repositories hf-risc
[/] [hf-risc/] [trunk/] [hf-riscv/] [platform/] [spartan3_starterkit/] [spartan3_SRAM.ucf] - Rev 21
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NET "clk_in" LOC = "T9";
NET "clk_in" TNM_NET = "clk_in";
TIMESPEC TS_clk_in = PERIOD "clk_in" 20 ns;
NET "int_in" LOC = "L13";
NET "reset_in" LOC = "M13";
NET "reset_in" CLOCK_DEDICATED_ROUTE = FALSE;
NET "uart_write" LOC = "R13"; #RX
NET "uart_read" LOC = "T13"; #TX
NET "extio_in<0>" LOC = "C5";
NET "extio_in<1>" LOC = "C6";
NET "extio_in<2>" LOC = "C7";
NET "extio_in<3>" LOC = "C8";
NET "extio_in<4>" LOC = "C9";
NET "extio_in<5>" LOC = "A3";
NET "extio_in<6>" LOC = "A4";
NET "extio_in<7>" LOC = "A5";
NET "extio_out<0>" LOC = "D5";
NET "extio_out<1>" LOC = "D6";
NET "extio_out<2>" LOC = "E7";
NET "extio_out<3>" LOC = "D7";
NET "extio_out<4>" LOC = "D8";
NET "extio_out<5>" LOC = "D10";
NET "extio_out<6>" LOC = "B4";
NET "extio_out<7>" LOC = "B5";
NET "ram_address<2>" LOC = "L5";
NET "ram_address<3>" LOC = "N3";
NET "ram_address<4>" LOC = "M4";
NET "ram_address<5>" LOC = "M3";
NET "ram_address<6>" LOC = "L4";
NET "ram_address<7>" LOC = "G4";
NET "ram_address<8>" LOC = "F3";
NET "ram_address<9>" LOC = "F4";
NET "ram_address<10>" LOC = "E3";
NET "ram_address<11>" LOC = "E4";
NET "ram_address<12>" LOC = "G5";
NET "ram_address<13>" LOC = "H3";
NET "ram_address<14>" LOC = "H4";
NET "ram_address<15>" LOC = "J4";
NET "ram_address<16>" LOC = "J3";
NET "ram_address<17>" LOC = "K3";
NET "ram_address<18>" LOC = "K5";
NET "ram_address<19>" LOC = "L3";
NET "ram_ce1_n" LOC = "P7";
NET "ram_ce2_n" LOC = "N5";
NET "ram_data<0>" LOC = "P2";
NET "ram_data<1>" LOC = "N2";
NET "ram_data<2>" LOC = "M2";
NET "ram_data<3>" LOC = "K1";
NET "ram_data<4>" LOC = "J1";
NET "ram_data<5>" LOC = "G2";
NET "ram_data<6>" LOC = "E1";
NET "ram_data<7>" LOC = "D1";
NET "ram_data<8>" LOC = "D2";
NET "ram_data<9>" LOC = "E2";
NET "ram_data<10>" LOC = "G1";
NET "ram_data<11>" LOC = "F5";
NET "ram_data<12>" LOC = "C3";
NET "ram_data<13>" LOC = "K2";
NET "ram_data<14>" LOC = "M1";
NET "ram_data<15>" LOC = "N1";
NET "ram_data<16>" LOC = "N7";
NET "ram_data<17>" LOC = "T8";
NET "ram_data<18>" LOC = "R6";
NET "ram_data<19>" LOC = "T5";
NET "ram_data<20>" LOC = "R5";
NET "ram_data<21>" LOC = "C2";
NET "ram_data<22>" LOC = "C1";
NET "ram_data<23>" LOC = "B1";
NET "ram_data<24>" LOC = "D3";
NET "ram_data<25>" LOC = "P8";
NET "ram_data<26>" LOC = "F2";
NET "ram_data<27>" LOC = "H1";
NET "ram_data<28>" LOC = "J2";
NET "ram_data<29>" LOC = "L2";
NET "ram_data<30>" LOC = "P1";
NET "ram_data<31>" LOC = "R1";
NET "ram_lb1_n" LOC = "P6";
NET "ram_lb2_n" LOC = "P5";
NET "ram_oe_n" LOC = "K4";
NET "ram_ub1_n" LOC = "T4";
NET "ram_ub2_n" LOC = "R4";
NET "ram_we_n" LOC = "G3";
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