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[/] [hpdmc/] [trunk/] [hpdmc_ddr32/] [test/] [idelay.v] - Rev 21

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/*
 * Simplified IDELAY model.
 * Only fixed delay type is implemented and assumed.
 */
 
`timescale 1ns / 1ps
 
module IDELAY #(
	parameter IOBDELAY_TYPE = "DEFAULT",
	parameter IOBDELAY_VALUE = 0
) (
	input C,
	input CE,
	input I,
	input INC,
	input RST,
	output reg O
);
 
always @(I)
	# (IOBDELAY_VALUE*0.078) O = I;
 
endmodule
 

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