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URL https://opencores.org/ocsvn/i2c_master_slave_core/i2c_master_slave_core/trunk

Subversion Repositories i2c_master_slave_core

[/] [i2c_master_slave_core/] [trunk/] [i2c_master_slave_core/] [i2c_master_slave_core/] [svtb/] [vmm_svtb/] [vmm_clkgen.sv] - Rev 6

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//////////////////////////////////////////////////////////////////////////////////////////
//                                                                                                                                                                              //
//      Verification Engineer:  Atish Jaiswal                                                                                           //
//      Company Name             :      TooMuch Semiconductor Solutions Pvt Ltd.                                        //
//                                                                                                                                                                              //
//  Description of the Source File:                                                                                                             //
//      This source code generates clock for the interface.                                                                     //
//                                                                                                                                                                              //
//////////////////////////////////////////////////////////////////////////////////////////

module clkgen(i2c_pin_if i);

  initial begin
    forever begin
      #5 i.clk = 1;
      #5 i.clk = 0;
    end
  end

endmodule

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