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-- File Name : fsub.vbe --
-- Description : The full subtractor --
-- Purpose : To be used by ASIMUT and SCMAP --
-- Date : Aug 22, 2001 --
-- Version : 1.1 --
-- Author : Martadinata A. --
-- Address : VLSI RG, Dept. of Electrical Engineering ITB, --
-- Bandung, Indonesia --
-- E-mail : marta@ic.vlsi.itb.ac.id --
entity fsub is
port(
a : in bit;
b : in bit;
bin : in bit;
d : out bit;
bout : out bit;
vdd : in bit;
vss : in bit
);
end fsub;
architecture vbe of fsub is
begin
assert ((vdd and not (vss)) = '1')
report "power supply is missing on fsub1"
severity warning;
d <= (a xor b) xor bin;
bout <= ((not a) and b) or ((not a) and bin) or (b and bin);
end;