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[/] [idea/] [trunk/] [fsm/] [inout_port/] [control_datain.fsm] - Rev 9

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-- File Name   : control_datain.fsm                             -- 
-- Description : The control of data-in blok                    --
-- Purpose     : To be used by SYF                              --
-- Date        : Aug 30, 2001                                   --
-- Version     : 1.1                                            --
-- Author      : Martadinata A.                                 --
-- Address     : VLSI RG, Dept. of Electrical Engineering ITB,  --
--               Bandung, Indonesia                             --
-- E-mail      : marta@ic.vlsi.itb.ac.id                        --

ENTITY control_datain IS
PORT ( clk,rst,dt_sended,emp_buf    : IN  BIT;
       en_bufin,req_dt,dt_ready     : OUT BIT;
       n_block                      : OUT BIT;
       vdd, vss                     : IN BIT
      );
END control_datain;

ARCHITECTURE fsm OF control_datain IS

TYPE STATE_TYPE IS (S0, S1, S2, S3, S4);

-- pragma CLOCK clk
-- pragma CURRENT_STATE CURRENT_STATE
-- pragma NEXT_STATE NEXT_STATE

SIGNAL CURRENT_STATE, NEXT_STATE: STATE_TYPE;

BEGIN
  PROCESS ( CURRENT_STATE, rst, emp_buf)
    BEGIN
      IF ( rst = '1' ) THEN
          NEXT_STATE <= S0;
          req_dt <= '1';    
          en_bufin <= '0';
          dt_ready <= '0';
          n_block  <= '0';
      ELSE
          CASE CURRENT_STATE IS
             WHEN S0 =>
                if(dt_sended = '1') then
                   req_dt   <= '0';
                   en_bufin <= '1';
                   dt_ready <= '0';
                   n_block  <= '0';
                   NEXT_STATE <= S1;
                 else
                   req_dt   <= '1';
                   en_bufin <= '0';
                   dt_ready <= '0';
                   n_block  <= '0';     
                   NEXT_STATE <= S0;
                 end if;                             
             WHEN S1 =>                    
                   req_dt   <= '1';
                   en_bufin <= '0';
                   dt_ready <= '0';
                   n_block  <= '1';
                   NEXT_STATE <= S2;                   
             WHEN S2 =>
                if(dt_sended = '1') then
                   req_dt   <= '0';
                   en_bufin <= '1';
                   dt_ready <= '0';
                   n_block  <= '1';
                   NEXT_STATE <= S3;
                else
                   req_dt   <= '1';
                   en_bufin <= '0';
                   dt_ready <= '0';
                   n_block  <= '1';     
                   NEXT_STATE <= S2;
                end if;                   
             WHEN S3 =>  
                   req_dt   <= '0';
                   en_bufin <= '0';                                
                   dt_ready <= '1';
                   n_block  <= '0';             
                   NEXT_STATE <= S4;  
             WHEN S4 => 
                if(emp_buf = '1') then
                   req_dt   <= '1';
                   en_bufin <= '0';     
                   dt_ready <= '0';
                   n_block  <= '0';                                           
                   NEXT_STATE <= S0;
                else
                   req_dt   <= '0';
                   en_bufin <= '0';     
                   dt_ready <= '1';
                   n_block  <= '0';                                           
                   NEXT_STATE <= S4;
                end if;
             WHEN OTHERS =>
                ASSERT ( '1' )
                REPORT "Illegal State";

          END CASE;
      END IF;
END PROCESS;

PROCESS (clk)
  BEGIN
    IF ((clk AND NOT clk'STABLE) ='1') THEN
         CURRENT_STATE <= NEXT_STATE;
    END IF;
END PROCESS;

END fsm;

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