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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [accMUX.v] - Rev 3
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`include "timescale.v" `include "defines.v" module accumulatorMUX (accMuxSel, immData, aluOut, accMuxOut); input [`accMuxSelLen-1:0] accMuxSel; input [`immDataLen-1:0] immData; input [7:0] aluOut; output [7:0] accMuxOut; reg [7:0] accMuxOut; always @ * begin case (accMuxSel) `accMuxSel0 : begin accMuxOut = immData; end `accMuxSel1 : begin accMuxOut = aluOut; end default : begin accMuxOut = 8'bzzzzzzzz; end endcase end endmodule
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