Subversion Repositories ion

Summary of the directories and files in this project. 


./
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./files.txt                 This file



./doc                       Documentation
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ion_project.pdf             Project documentation (built with LaTeX).
./doc/src/*                 LaTeX source files, including images.



./src                       C and assembler sources for some tests and demos
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readme.txt                  Short usage instructions for the code samples
bin2hdl.py                  Python script that builds vhdl tables from bin files
                            (no longer used)
ion_noxram.lds              Load script for default bare system configuration
mips_mpu_template.vhdl      Template for mpu system, no longer used.
mips_tb1_template.vhdl      Template for simulation, no longer used.
mips_tb0_template.vhdl      Template for sim. test bench (single memory block)
mips_tb2_template.vhdl      Template for sim. test bench, no longer used.

./src/common                Source files common to all samples
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makefile                    Makefile included from all other makefiles.
bootstrap.s                 Reset code (cache initialization, etc.)
opcode_emu.s                MIPS-32 opcode emulation (optional).
c_startup.s                 C startup code.
libsoc/                     Minimalistic libc replacement.

./src/opcodes               Simple opcode tester for simulation only.
./src/hello                 Hello World sample.
./src/memtest               Simple memory tester.
./src/adventure             Adventure classic.



./vhdl                      VHDL sources
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mips_pkg.vhdl               Package with declarations common to all modules
mips_cpu.vhdl               Main CPU core module (excludes caches)
mips_shifter.vhdl           Barrel shifter module
mips_alu.vhdl               ALU module
mips_mult.vhdl              Multiplier/divider mudule (from Plasma)
mips_cache.vhdl             Cache + memory controller module.
mips_cache_stub.vhdl        'Stub', empty cache module, no longer used.
mips_sdram_controller.vhdl  SDRAM controller, yet to be used.

./vhdl/SoC                  Source files for ION SoC module
--------------------------------------------------------------------------------
mips_soc.vhdl               SoC built around the ION core.
uart.vhdl                   Hardwired UART.
bootstrap_code_pkg.vhdl     Pack. with bootstrap code (dynamically generated).


./vhdl/tb                   VHDL source for simulation test bench
--------------------------------------------------------------------------------
txt_util.vhdl               Utility functions for string handling
mips_tb.vhdl                Simulation test bench (see project doc)
mips_tb_pkg.vhdl            Simulation utility package, including logger.
sim_params_pkg.vhdl         Simulation parameters & code (generated dynamically)

./vhdl/demo                 Source files for hardware demo on DE-1 board
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c2sb_demo.csv               Assignments file to be imported from Altera IDE
c2sb_demo.vhdl              Top level source of demo


./sim                       Simulation scripts for Modelsim (tcl)
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mips_tb.do                  Runs test bench /vhdl/tb/mips_tb.vhdl
mips_tb_wave.do             Sub-script used to set-up Modelsim's wave window


./tools                     Assorted
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./tools/slite               SW simulator, plus CodeBlocks project file.
./tools/build_pkg           Package builder, used in all code samples.


./syn                       Simulation and synthesis runtime stuff
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Simulation scripts are assumed to run from here (see ./sim/readme.txt).
Besides, here is where I put the synthesis stuff.
This directory is versioned but contents are not.