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[/] [irda/] [trunk/] [sim/] [rtl_sim/] [bin/] [nc_sir.scr] - Rev 13

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+libext+.v
+access+wr
+mess 
+incdir+../../../rtl/verilog
+tcl+../bin/sim.tcl
-y ../../../rtl/verilog
../../../bench/verilog/irda_sir_test.v
//+gui
 

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