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[/] [kiss-board/] [tags/] [initial/] [kiss-board_soc/] [fpg_altera/] [tessera_top.map.summary] - Rev 11

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Flow Status : Successful - Thu May 18 13:08:55 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : tessera_top
Top-level Entity Name : tessera_top
Family : Cyclone
Device : EP1C12Q240C6
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 13,630
Total pins : 171
Total virtual pins : 0
Total memory bits : 166,656
Total PLLs : 1

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