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------------------------------------------------------------------------------- -- Title : Hierarchical parametrized block for finding of maximum element -- Project : ------------------------------------------------------------------------------- -- File : max_finder.vhd -- Author : Wojciech M. Zabolotny ( wzab01<at>gmail.com ) -- Company : -- License : BSD -- Created : 2013-11-01 -- Last update: 2015-09-23 -- Platform : -- Standard : VHDL'93/02 ------------------------------------------------------------------------------- -- Description: Block for finding of maximum element, version modified for -- demonstration of the method for automatic adjustment of delay -- in the pipelined architectures ------------------------------------------------------------------------------- -- Copyright (c) 2014 ------------------------------------------------------------------------------- -- Revisions : -- Date Version Author Description -- 2013-11-01 1.0 WZab Created ------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.NUMERIC_STD.all; library work; use work.lateq_pkg.all; use work.ex1_pkg.all; use work.ex1_trees_pkg.all; entity max_finder is generic( N_OF_ALL_INS : integer ); port ( dins : in T_USER_DATA_SET(0 to N_OF_ALL_INS-1); dout : out T_USER_DATA_MRK; clk : in std_logic; rst_p : in std_logic ); end max_finder; architecture beh of max_finder is constant N_OF_LEVELS : integer := ex1_nof_stages(N_OF_ALL_INS, EX1_NOF_INS_IN_CMP); -- Due to VHDL limitations, we have to declare the array of signals -- consisiting of N_OF_LEVELS * MF_NOF_INPUTS elements. -- Most of them will be removed by the synthesis tools. constant C_N_OF_INS_1ST_STAGE : integer := (EX1_NOF_INS_IN_CMP**N_OF_LEVELS); type T_MF_INTERNAL_DATUM is array (0 to C_N_OF_INS_1ST_STAGE-1) of T_USER_DATA_WITH_POS; type T_MF_INTERNAL_DATA is array (0 to N_OF_LEVELS) of T_MF_INTERNAL_DATUM; signal mf_internal_data : T_MF_INTERNAL_DATA := (others => (others => C_USER_DATA_WITH_POS_INIT)); begin -- Here we generate tree of comparators g1 : for i in 0 to n_of_levels-1 generate -- level 0 is the output level g2 : for j in 0 to (EX1_NOF_INS_IN_CMP**i)-1 generate signal data_in : T_EX1_CMP_INS := (others => C_USER_DATA_WITH_POS_INIT); begin g3 : for k in 0 to EX1_NOF_INS_IN_CMP-1 generate --assert false report "indices:" & integer'image(i) & "," & integer'image(j) & "," & integer'image(k) severity note; data_in(k) <= mf_internal_data(i+1)(j*EX1_NOF_INS_IN_CMP+k); end generate g3; max_finder_1st_1 : entity work.max_finder_1st port map ( dins => data_in, dout => mf_internal_data(i)(j), clk => clk, rst_p => rst_p); end generate g2; end generate g1; -- Process connecting the inputs process (dins) is begin -- process for i in 0 to N_OF_ALL_INS-1 loop --report "mf n of levels=" & integer'image(N_OF_LEVELS) severity note; --report "i=" & integer'image(i) severity note; mf_internal_data(n_of_levels)(i) <= ( d => dins(i), p => i ); end loop; -- i end process; -- Copy the output value. Replace data value with its position! dout <= ( -- pragma translate_off lateq_mrk => mf_internal_data(0)(0).d.lateq_mrk, -- pragma translate_on data => to_signed(mf_internal_data(0)(0).p, C_USER_DATA_WIDTH), valid => mf_internal_data(0)(0).d.valid ); end beh;