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[/] [layer2/] [trunk/] [README] - Rev 9
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+------------------------------------------------------------------------------+| || layer[2] SoC for Spartan-3E Starter Kit || |+------------------------------------------------------------------------------+The layer[2] system-on-a-chip combines to the greatest possible extent aMIPS I(tm) compatible CPU with various memories and I/O-controllers.The spectrum of supported memories includes (inter alia) adjacent to aninternal 16 kB memory, a flash-memory of 16 MB.The input/output capabilities of the system are realized by a PS/2 keyboardcontroller for handling the input and a VGA-textmode-controller responsiblefor output purposes.For the communication with other computer systems a RS-232 interface is used.The implementation of the hardware components was accomplished by the usageof the VHDL hardware description language and furthermore these componentswere synthesised for the Spartan-3E Starter Kit.Because of the compatibility with the MIPS I(tm) ISA, it is additionallypossible to compile software with the GCC for layer[2].+------------------------------------------------------------------------------+| Toolchain Setup |+------------------------------------------------------------------------------+This Section helps you with setting up the toolchain appropriatly.+---------------------------------------------------------------------------+| cygwin |+---------------------------------------------------------------------------+Installing cygwin is pretty easy. Just download the Installer from thecygwin homepage.After you have selected a download mirror, you will be prompted a"Select Packages" Window. We need Python for the upload script<sw/common/upload.py> and the memory file generator script<sw/common/vhd.py>, so check if its node is set to Default(This should suffice).The Devel node contains 'make', 'subversion', 'binutils' and the 'gcc'.These packages should be selected by default.+---------------------------------------------------------------------------+| ISE WebPack |+---------------------------------------------------------------------------+You can download the WebPack here if you haven't already installed it.The hardware build script xilinx/Makefile assumes that you have installedthe WebPack at "C:\Xilinx". If your installation is located somewhereelse, don't forget to adjust the build script.+---------------------------------------------------------------------------+| pySerial |+---------------------------------------------------------------------------+Download and extract pySerial. Open cygwin and navigate into the pySerialdirectory. Typepython setup.py installIf you still get some error when using the upload script, you probablyneed to install pyWin as well.+---------------------------------------------------------------------------+| GCC Cross Compiler |+---------------------------------------------------------------------------+Go to Cygwin Mirror Sites and download the newest source packages'binutils-*-src.tar.bz', 'gcc-core-*-src.tar.bz' as well as'mpfr-*-src.tar.bz'. First we define some global variables. In cygwin typeline-by-line:export TARGET=mips-elfexport PREFIX=/usr/local/$TARGETexport PATH=$PATH:$PREFIX/binExtract the archives into the directories 'binutils', 'gcc' and 'mpfr'respectively. In cygwin go to your directory that contains the extracteddirectories and type line-by-line:mkdir build-binutilscd build-binutils../binutils/configure --target=$TARGET --prefix=$PREFIXmakemake installcd ..Next, we compile MPFR which is a prerequisite for GCC:mkdir build-mpfrcd build-mpfrmakemake installcd ..And finally, GCC:mkdir build-gcccd build-gcc../gcc/configure --with-newlib --without-headers \--enable-languages="c" --target=$TARGET --prefix=$PREFIX \--with-gnu-ld --with-gnu-as --disable-libssp --with-mpfr=$PREFIXmakemake installcd ..If the compilation ends with an error, search 'build-gcc' for the binaries'mips-elf-cc1.exe' and 'mips-elf-gcc.exe' and copy them manually into thedirectory </usr/local/mips-elf/bin>+------------------------------------------------------------------------------+| User Guide |+------------------------------------------------------------------------------+The following section describes how to build and upload the hardware, thebootloader and the demo software.+---------------------------------------------------------------------------+| Hardware |+---------------------------------------------------------------------------+To build the hardware just navigate to <xilinx/> and entermake buildOnce completed, you can upload it onto your Starter Kit withmake uploadThis just loads it directly onto your Spartan-3E. If you wish to load thedesign to the Plattform Flash typemake promIf nothing shows up on the display, you might accidetally erased the CPLD.Start the iMPACT GUI and upload <xilinx/CPLD_bypass_logic.jed> to theCPLD.+---------------------------------------------------------------------------+| Building the Bootloader |+---------------------------------------------------------------------------+The source for the 'void Bootloader' is located at <sw/void>. You canbuild it withmake standaloneThis will create the binary and translates it into the VHDL memory file<sw/bin/data.vhd>. You need to rebuild the hardware subsequently.+---------------------------------------------------------------------------+| Configuring 'upload.py' |+---------------------------------------------------------------------------+The serial port number of the upload script <sw/common/upload.py> needs tobe adjusted.34] port = 4, # 'COM5',+---------------------------------------------------------------------------+| Uploading images |+---------------------------------------------------------------------------+Start layer[2] and select 'Upload image ...'. You can navigate with the'ARROW UP' and 'ARROW DOWN' keys. The system now waits for some incommingserial transmission.In cygwin switch to the directory where <sw/tennmino/> resides and typemake uploadThis will build and upload the application. If everything went well,you'll see the 'void Bootloader' start-up screen again.If you select 'View memory contents ...', you can monitor the contents ofthe StrataFlash and the DDR. 'ARROW UP' and 'ARROW DOWN' increases ordecreases the starting address of the displayed memory contentsrespectively. Press 'ESC' to return.With 'Start ...' the contents of the StrataFlash will be loaded to the DDRand the system starts the execution of the uploaded program.
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