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[/] [layer2/] [trunk/] [vhdl/] [vga/] [bench/] [vga_constr.ucf] - Rev 2
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# Primary clockNET "CLK" LOC = "C9" |IOSTANDARD = LVCMOS33 |TNM_NET = TNM_clk ;TIMESPEC TS_clk = PERIOD "TNM_clk" 20 ns HIGH 50% ;# VGA ConnectionsNET "VGA_RED" LOC = "H14" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = FAST ;NET "VGA_GREEN" LOC = "H15" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = FAST ;NET "VGA_BLUE" LOC = "G15" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = FAST ;NET "VGA_HSYNC" LOC = "F15" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = FAST ;NET "VGA_VSYNC" LOC = "F14" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = FAST ;