Subversion Repositories layer2

# Primary Clock
NET "CLK_I" LOC = C9 | IOSTANDARD = "LVCMOS33" | TNM_NET = CLK_I;
TIMESPEC TS_CLK_I = PERIOD "CLK_I" 20 ns HIGH 50%;

# VGA Connections
NET "VGA_RED"   LOC = H14 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
NET "VGA_GREEN" LOC = H15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
NET "VGA_BLUE"  LOC = G15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
NET "VGA_HSYNC" LOC = F15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
NET "VGA_VSYNC" LOC = F14 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;

# Keyboard
NET "PS2_CLK"  LOC = G14 |IOSTANDARD = "LVCMOS33" |DRIVE = 8 |SLEW = SLOW;
NET "PS2_DATA" LOC = G13 |IOSTANDARD = "LVCMOS33" |DRIVE = 8 |SLEW = SLOW;

# RS232 DCE Connections
NET "RS232_DCE_RXD" LOC = "R7"  |IOSTANDARD = LVTTL;
NET "RS232_DCE_TXD" LOC = "M14" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = SLOW ;

# LEDS
NET "LED<7>" LOC = "F9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<6>" LOC = "E9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "LED<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;

# StrataFlash
NET "SF_OE"    LOC = "C18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_CE"    LOC = "D16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_WE"    LOC = "D17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_BYTE"  LOC = "C17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
#NET "SF_STS"  LOC = "B18" | IOSTANDARD = LVCMOS33 | PULLUP;

NET "SF_A<0>"  LOC = "H17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<1>"  LOC = "J13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<2>"  LOC = "J12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<3>"  LOC = "J14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<4>"  LOC = "J15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<5>"  LOC = "J16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<6>"  LOC = "J17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<7>"  LOC = "K14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<8>"  LOC = "K15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<9>"  LOC = "K12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<10>" LOC = "K13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<11>" LOC = "L15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<12>" LOC = "L16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<13>" LOC = "T18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<14>" LOC = "R18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<15>" LOC = "T17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<16>" LOC = "U18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<17>" LOC = "T16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<18>" LOC = "U15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<19>" LOC = "V15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<20>" LOC = "T12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<21>" LOC = "V13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<22>" LOC = "V12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_A<23>" LOC = "N11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

NET "SF_D<0>"  LOC = "N10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<1>"  LOC = "P10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<2>"  LOC = "R10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<3>"  LOC = "V9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<4>"  LOC = "U9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<5>"  LOC = "R9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<6>"  LOC = "M9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "SF_D<7>"  LOC = "N9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

NET "LCD_RW"       LOC = "L17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "LCD_E"        LOC = "M18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "SPI_ROM_CS"   LOC = "U3"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "SPI_ADC_CONV" LOC = "P11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "SPI_DAC_CS"   LOC = "N8"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "PF_OE"        LOC = "T3"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

# DDR2
NET "SD_A<12>" LOC = "P2" | IOSTANDARD = SSTL2_I;
NET "SD_A<11>" LOC = "N5" | IOSTANDARD = SSTL2_I;
NET "SD_A<10>" LOC = "T2" | IOSTANDARD = SSTL2_I;
NET "SD_A<9>"  LOC = "N4" | IOSTANDARD = SSTL2_I;
NET "SD_A<8>"  LOC = "H2" | IOSTANDARD = SSTL2_I;
NET "SD_A<7>"  LOC = "H1" | IOSTANDARD = SSTL2_I;
NET "SD_A<6>"  LOC = "H3" | IOSTANDARD = SSTL2_I;
NET "SD_A<5>"  LOC = "H4" | IOSTANDARD = SSTL2_I;
NET "SD_A<4>"  LOC = "F4" | IOSTANDARD = SSTL2_I;
NET "SD_A<3>"  LOC = "P1" | IOSTANDARD = SSTL2_I;
NET "SD_A<2>"  LOC = "R2" | IOSTANDARD = SSTL2_I;
NET "SD_A<1>"  LOC = "R3" | IOSTANDARD = SSTL2_I;
NET "SD_A<0>"  LOC = "T1" | IOSTANDARD = SSTL2_I;

NET "SD_DQ<15>" LOC = "H5" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<14>" LOC = "H6" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<13>" LOC = "G5" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<12>" LOC = "G6" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<11>" LOC = "F2" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<10>" LOC = "F1" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<9>"  LOC = "E1" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<8>"  LOC = "E2" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<7>"  LOC = "M6" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<6>"  LOC = "M5" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<5>"  LOC = "M4" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<4>"  LOC = "M3" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<3>"  LOC = "L4" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<2>"  LOC = "L3" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<1>"  LOC = "L1" | IOSTANDARD = SSTL2_I;
NET "SD_DQ<0>"  LOC = "L2" | IOSTANDARD = SSTL2_I;

NET "SD_BA<0>" LOC = "K5" | IOSTANDARD = SSTL2_I ;
NET "SD_BA<1>" LOC = "K6" | IOSTANDARD = SSTL2_I ;

NET "SD_CK_N" LOC = "J4" | IOSTANDARD = SSTL2_I ;
NET "SD_CK_P" LOC = "J5" | IOSTANDARD = SSTL2_I ;
NET "SD_CKE"  LOC = "K3" | IOSTANDARD = SSTL2_I ;

NET "SD_CMD<3>" LOC = "K4" | IOSTANDARD = SSTL2_I;    # SD_CS
NET "SD_CMD<2>" LOC = "C1" | IOSTANDARD = SSTL2_I;    # SC_RAS
NET "SD_CMD<1>" LOC = "C2" | IOSTANDARD = SSTL2_I;    # SD_CAS
NET "SD_CMD<0>" LOC = "D1" | IOSTANDARD = SSTL2_I;    # SD_WE

NET "SD_DM<1>" LOC = "J1" | IOSTANDARD = SSTL2_I;     # SD_UDM
NET "SD_DM<0>" LOC = "J2" | IOSTANDARD = SSTL2_I;     # SD_LDM

NET "SD_DQS<1>" LOC = "G3" | IOSTANDARD = SSTL2_I;    # SD_UDQS
NET "SD_DQS<0>" LOC = "L6" | IOSTANDARD = SSTL2_I;    # SD_LDQS

# Path to allow connection to top DCM connection
#NET "SD_CK_FB" LOC = "B9" | IOSTANDARD = LVCMOS33;

# Prohibit VREF pins
CONFIG PROHIBIT = D2;
CONFIG PROHIBIT = G4;
CONFIG PROHIBIT = J6;
CONFIG PROHIBIT = L5;
CONFIG PROHIBIT = R4;