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[/] [line_codes/] [trunk/] [doc/] [RUNNING.txt] - Rev 8

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Present in bench/vhdl are files showing simple usage examples of 
the line codes examples. This files shows how to test them. 

these running simulation examples requires ghdl and gtkwave for
viewing vcd files. If you're going to use another VHDL simulator, 
this can be useful: 
ghdl -a file.vhd
 means analyse:
 http://ghdl.free.fr/ghdl/Analysis-command.html
ghdl -e file 
 mean elaborate: 
 http://ghdl.free.fr/ghdl/Elaboration-command.html
ghdl -r file or ./file 
 means run: 
 http://ghdl.free.fr/ghdl/Run-command.html

cd bench/vhdl

1. Simulating the AMI decoder. 

ghdl -a ../../rtl/vhdl/ami_dec.vhd 
ghdl -a smlt_ami_dec.vhd 
ghdl -e smlt_ami_dec
./smlt_ami_dec --vcd=ad.vcd
gtkwave ad.vcd 
append the signals clk, e0, e1, s, clrb
clk  -> clock signal.
e0   -> input signal #0. 
e1   -> input signal #1. 
s    -> unique output signal 
clrb -> bar clear signal.
choose the best fit zoom. 

cleaning: 
rm *.o smlt_ami_dec work-obj93.cf  ad.vcd


2. Simulating the AMI encoder. 

ghdl -a ../../rtl/vhdl/ami_enc.vhd 
ghdl -a smlt_ami_enc.vhd 
ghdl -e smlt_ami_enc
./smlt_ami_enc --vcd=ae.vcd
gtkwave ae.vcd 
append the signals  clk, e, s0, s1, clrb
clk  -> clock signal.
e    -> unique input signal 
s0   -> output signal #0. 
s1   -> output signal #1. 
clrb -> bar clear signal.
choose the best fit zoom. 

cleaning: 
rm *.o smlt_ami_enc work-obj93.cf  ae.vcd


3. Simulating the HDB1 decoder. 

ghdl -a ../../rtl/vhdl/hdb1_dec.vhd 
ghdl -a smlt_hdb1_dec.vhd 
ghdl -e smlt_hdb1_dec
./smlt_hdb1_dec --vcd=h1d.vcd
gtkwave h1d.vcd 
append the signals clk, e0, e1, s, clrb
clk  -> clock signal.
e0   -> input signal #0. 
e1   -> input signal #1. 
s    -> unique output signal 
clrb -> bar clear signal.
choose the best fit zoom. 

cleaning: 
rm *.o smlt_hdb1_dec work-obj93.cf  h1d.vcd

4. Simulating the HDB1 encoder. 

ghdl -a ../../rtl/vhdl/hdb1_enc.vhd 
ghdl -a smlt_hdb1_enc.vhd 
ghdl -e smlt_hdb1_enc
./smlt_hdb1_enc --vcd=h1e.vcd
gtkwave h1e.vcd 
append the signals  clk, e, s0, s1, clrb
clk  -> clock signal.
e    -> unique input signal 
s0   -> output signal #0. 
s1   -> output signal #1. 
clrb -> bar clear signal.
choose the best fit zoom. 

cleaning: 
rm *.o smlt_hdb1_enc work-obj93.cf  h1e.vcd



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