Subversion Repositories loadbalancer

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#               LB_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#               assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Stratix II"
set_global_assignment -name DEVICE AUTO
set_global_assignment -name TOP_LEVEL_ENTITY LB
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:31:53  DECEMBER 26, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS OFF
set_global_assignment -name FMAX_REQUIREMENT "125 MHz"
set_global_assignment -name VERILOG_FILE ethernet_parser.v
set_global_assignment -name VERILOG_FILE ethernet_parser_32bit.v
set_global_assignment -name VERILOG_FILE ethernet_parser_64bit.v
set_global_assignment -name VECTOR_WAVEFORM_FILE LB.vwf
set_global_assignment -name VERILOG_FILE classifier_arbiter/classifier_arbiter.v
set_global_assignment -name VHDL_FILE PASS/pass.vhd
set_global_assignment -name VERILOG_FILE small_fifo.v
set_global_assignment -name VHDL_FILE TABLE/Aging_Timer.vhd
set_global_assignment -name VHDL_FILE TABLE/div_binary.vhd
set_global_assignment -name VHDL_FILE TABLE/mac_ram_table.vhd
set_global_assignment -name VHDL_FILE TABLE/manager.vhd
set_global_assignment -name VHDL_FILE TABLE/ram_256x48.vhd
set_global_assignment -name VHDL_FILE TABLE/table.vhd
set_global_assignment -name VHDL_FILE TABLE/valid_address.vhd
set_global_assignment -name VHDL_FILE Router/router.vhd
set_global_assignment -name VHDL_FILE int2ext/int2ext.vhd
set_global_assignment -name VHDL_FILE int2ext/int2ext_top.vhd
set_global_assignment -name VHDL_FILE int2ext/vlan2ext.vhd
set_global_assignment -name VHDL_FILE Balance/balance.vhd
set_global_assignment -name VHDL_FILE Balance/balance_top.vhd
set_global_assignment -name VHDL_FILE Balance/hash.vhd
set_global_assignment -name VHDL_FILE Balance/n_mac.vhd
set_global_assignment -name VHDL_FILE ARP/arp_parser.vhd
set_global_assignment -name VHDL_FILE ARP/arp_response.vhd
set_global_assignment -name VHDL_FILE ARP/arp_top.vhd
set_global_assignment -name VHDL_FILE Classfier/classifier.vhd
set_global_assignment -name VHDL_FILE Classfier/open_header.vhd
set_global_assignment -name VHDL_FILE balancer_top.vhd
set_global_assignment -name VHDL_FILE config.vhd
set_global_assignment -name BDF_FILE LB.bdf
set_global_assignment -name VERILOG_FILE output_port_lookup.v
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE TABLE/Manger_top.vwf