Subversion Repositories m1_core

### Clock ###
# Main clock running @ 50 MHz
NET "sys_clock_i" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
NET "sys_clock_i" PERIOD = 20.0ns HIGH 40%;

### Rotary ###
# Pressing the center of the rotary switch will reset the chip
NET "sys_reset_i" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;

### VGA Port ###
NET "vga_rgb_r_o" LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "vga_rgb_g_o" LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "vga_rgb_b_o" LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "vga_hsync_o" LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "vga_vsync_o" LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;

### PS/2 Keyboard interface ###
NET "ps2_keyboard_clock_io" LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "ps2_keyboard_data_io" LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;

### DDR SDRAM ###
NET "ddr_clk"         LOC = "J5" | IOSTANDARD = SSTL2_I ;
NET "ddr_clk_n"       LOC = "J4" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<0>"        LOC = "T1" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<1>"        LOC = "R3" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<2>"        LOC = "R2" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<3>"        LOC = "P1" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<4>"        LOC = "F4" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<5>"        LOC = "H4" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<6>"        LOC = "H3" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<7>"        LOC = "H1" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<8>"        LOC = "H2" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<9>"        LOC = "N4" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<10>"       LOC = "T2" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<11>"       LOC = "N5" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<12>"       LOC = "P2" | IOSTANDARD = SSTL2_I ;
NET "ddr_ba<0>"       LOC = "K5" | IOSTANDARD = SSTL2_I ;
NET "ddr_ba<1>"       LOC = "K6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<0>"       LOC = "L2" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<1>"       LOC = "L1" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<2>"       LOC = "L3" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<3>"       LOC = "L4" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<4>"       LOC = "M3" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<5>"       LOC = "M4" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<6>"       LOC = "M5" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<7>"       LOC = "M6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<8>"       LOC = "E2" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<9>"       LOC = "E1" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<10>"      LOC = "F1" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<11>"      LOC = "F2" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<12>"      LOC = "G6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<13>"      LOC = "G5" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<14>"      LOC = "H6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dq<15>"      LOC = "H5" | IOSTANDARD = SSTL2_I ;
NET "ddr_dm<0>"       LOC = "J2" | IOSTANDARD = SSTL2_I ;
NET "ddr_dm<1>"       LOC = "J1" | IOSTANDARD = SSTL2_I ;
NET "ddr_dqs<0>"      LOC = "L6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dqs<1>"      LOC = "G3" | IOSTANDARD = SSTL2_I ;
NET "ddr_cs_n"        LOC = "K4" | IOSTANDARD = SSTL2_I ;
NET "ddr_cke"         LOC = "K3" | IOSTANDARD = SSTL2_I ;
NET "ddr_ras_n"       LOC = "C1" | IOSTANDARD = SSTL2_I ;
NET "ddr_cas_n"       LOC = "C2" | IOSTANDARD = SSTL2_I ;
NET "ddr_we_n"        LOC = "D1" | IOSTANDARD = SSTL2_I ;