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[/] [m65c02/] [trunk/] [Src/] [M65C02-Test-Programs/] [M65C02_Tst3.a65] - Rev 2
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Copyright 2012 by Michael A. Morris, dba M. A. Morris & Associates;;;; All rights reserved. The source code contained herein is publicly released;; under the terms and conditions of the GNU Lesser Public License. No part of;; this source code may be reproduced or transmitted in any form or by any;; means, electronic or mechanical, including photocopying, recording, or any;; information storage and retrieval system in violation of the license under;; which the source code is released.;;;; The souce code contained herein is free; it may be redistributed and/or;; modified in accordance with the terms of the GNU Lesser General Public;; License as published by the Free Software Foundation; either version 2.1 of;; the GNU Lesser General Public License, or any later version.;;;; The souce code contained herein is freely released WITHOUT ANY WARRANTY;;; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A;; PARTICULAR PURPOSE. (Refer to the GNU Lesser General Public License for;; more details.);;;; A copy of the GNU Lesser General Public License should have been received;; along with the source code contained herein; if not, a copy can be obtained;; by writing to:;;;; Free Software Foundation, Inc.;; 51 Franklin Street, Fifth Floor;; Boston, MA 02110-1301 USA;;;; Further, no use of this source code is permitted in any form or means;; without inclusion of this banner prominently in any derived works.;;;; Michael A. Morris;; Huntsville, AL;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #------------------------------------------------------------------------#; | |; | M65C02_Tst2.A65 |; | |; | Test program for M65C02_Core.v |; | |; | Copyright 2012, Michael A. Morris |; | |; #------------------------------------------------------------------------#;; File created 11-Feb-2012;; Modified 09-Dec-2012 mam Changed to a "ROM" type of test program; where the program is at the top of memory; and includes the three vectors. Intent is to; convert core so it indirectly jump through; the normal processor vectors when an excep-; is performed: Reset, NMI, or IRQ/BRK.;; To make this change need to add code to; initialize page 0, 1, and 2 RAM locations.;; Modified 15-Dec-2012 mam Modified to remove Rockwell instruction op-; codes from the NOP/Invalid instruction list.;title "M65C02_Core Test Program - all instructions";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Define macros for the Rockwell instructions;;RMBx macro BitNum, ZPdb ((BitNum+0)*16)+7db ZPendm;;SMBx macro BitNum, ZPdb ((BitNum+8)*16)+7db ZPendm;;BBRx macro BitNum, ZP, DstLBL\? db ((BitNum+0)*16)+15db ZPif(Dst < LBL\?+3)db -(Dst-LBL\?+1)elsedb (Dst-LBL\?-3)endifendm;;BBSx macro BitNum, ZP, DstLBL\? db ((BitNum+8)*16)+15db ZPif(Dst < LBL\?+3)db -(Dst-LBL\?+1)elsedb (Dst-LBL\?-3)endifendm;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Define macros for the W65802/65816 instructions implemented in W65C02S;;STP macrodb $DBendm;;WAI macrodb $CBendm;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;ROM_Start equ $F800 ;; Boot "ROM" Start Address;;NMI_Vector equ $FFFA ;; Normal Non-maskable Interrupt VectorRST_Vector equ $FFFC ;; Normal Reset VectorIRQ_Vector equ $FFFE ;; Normal Maskable Interrupt or BRK Vector;;IRQ_On equ $FFF8 ;; Set External Interrupt RequestIRQ_Off equ $FFF9 ;; Clr External Interrupt Request;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;bssorg $0000;;Hi_Return ds 1Neg_Return ds 2;;org $0008;;pDPI ds 2 ;; DP = (pDPI)pDPXI ds 2 ;; DPX = (pDPI,X) {X = 2}pDPIY ds 2 ;; DPY = (pDPI),Y {Y = 2};;org $0010;;DP ds 1 ;; DP; DP,X (X = 0); DP,Y (Y = 0)DPX ds 1 ;; DPX; DP,X (X = 1); DP,Y (Y = 1)DPY ds 1 ;; DPY; DP,X (X = 2); DP,Y (Y = 2);;org $00FF;;Lo_Return ds 1;;bssStack_Page org $0100;;RAM_Start org $0200;;Abs ds 1AbsX ds 1AbsY ds 1;;codeorg ROM_StartStart jmp Abs_Dst;;Jmp_AbsI dw AbsI_DstJmp_AbsXI dw AbsXI_Dst;;ds 1;;Interrupt pha ;; preserve Accphp ;; push current PSW, on entry D cleared andpla ;; I should be setbit #$08 ;; check if BCD mode not setbne * ;; if <> 0, errorbit #$04 ;; check is Interrupt Mask setbeq * ;; if == 0, errorpla ;; restore AccISR_End rti ;; Exit ISR;;Init_RAM lda #(lo Return)sta Lo_Returnlda #(hi Return)sta Hi_Return;;lda #(lo -Return)sta Hi_Return+1lda #(hi -Return)sta Hi_Return+2;;lda #(lo DP)sta pDPIstz pDPI+1;;lda #(lo DPX)sta pDPXIstz pDPXI+1;;lda #(lo DPY)sta pDPIYstz pDPIY+1;;Return rts;;Abs_Dst jmp (Jmp_AbsI)nopAbsI_Dst jmp (Jmp_AbsXI, x)nop;;AbsXI_Dst jsr ReturnnopTest_Main bra Fwd ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}Tst_BPL lda #$80 ;; Imm, A = 0x80, P = 0xA4Err_BPL bpl Err_BPL ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}eor #$80 ;; Imm, A = 0x00, P = 0x26Err_BMI bmi Err_BMI ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}sec ;; Imp, A = 0x00, P = 0x27Err_BCC bcc Err_BCC ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}sbc #$80 ;; Imm, A = 0x80, P = 0xE4Err_BVC bvc Err_BVC ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}Err_BCS bcs Err_BCS ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}Err_BEQ beq Err_BEQ ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}sbc #$7F ;; Imm, A = 0x00, P = 0x67clv ;; Imp, A = 0x00, P = 0x27Err_BVS bvs Err_BVS ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}Err_BNE bne Err_BNE ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}clc ;; Imp, A = 0x00, P = 0x26Err_BCS2 bcs Err_BCS2 ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}bra ContinueFwd bra Tst_BPL ;; Test Conditional Branch Instructions;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Implicit/Accumulator/Immediate Address Instructions;;Continue nop ;; Imp, A = 0x00, P = 0x26;;cli ;; Imp, A = 0x00, P = 0x22php ;; Psh, (S) = 0x22, P = 0x22pla ;; Pop, A = 0x22, P = 0x20and #$04 ;; Imm, A = 0x00, P = 0x22bne * ;; Rel, A = 0x00, P = 0x22nop ;; Imp, A = 0x00, P = 0x22;;sei ;; Imp, A = 0x00, P = 0x26php ;; Psh, (S) = 0x26, P = 0x26pla ;; Pop, A = 0x26, P = 0x24and #$04 ;; Imm, A = 0x04, P = 0x24beq * ;; Rel, A = 0x04, P = 0x24nop ;; Imp, A = 0x04, P = 0x24;;sed ;; Imp, A = 0x04, P = 0x2Cphp ;; Psh, (S) = 0x2C, P = 0x2Cpla ;; Pop, A = 0x2C, P = 0x2Cand #$08 ;; Imm, A = 0x08, P = 0x2Cbeq * ;; Rel, A = 0x08, P = 0x2Cnop ;; Imp, A = 0x08, P = 0x2C;;cld ;; Imp, A = 0x08, P = 0x24php ;; Psh, A = 0x08, P = 0x24pla ;; Pop, A = 0x24, P = 0x24and #$08 ;; Imm, A = 0x00, P = 0x26bne * ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}nop ;; Imp, A = 0x00, P = 0x26;;lda #$55 ;; Imm, A = 0x55, P = 0x24ora #$AA ;; Imm, A = 0xFF, P = 0xA4pha ;; Psh, A = 0xFF, P = 0xA4plp ;; Pop, A = 0xFF, P = 0xEFbvc * ;; Stop if ~Vbne * ;; Stop if ~Zbcc * ;; Stop if ~Cbpl * ;; Stop if ~N;;cmp #$FF ;; Imm, A = 0xFF, P = 0x6F Make sure A is -1bne * ;; Rel, A = 0xFF, P = 0x6Fbmi * ;; Rel, A = 0xFF, P = 0x6Fbcc * ;; Rel, A = 0xFF, P = 0x6F;;clc ;; Imp, A = 0xFF, P = 0x6Ecld ;; Imp, A = 0xFF, P = 0x66clv ;; Imm, A = 0xFF, P = 0x66adc #$01 ;; Imm, A = 0x00, P = 0x27ora #$04 ;; Imm, A = 0x04, P = 0x25pha ;; Psh, A = 0x04, P = 0x25plp ;; Pop, A = 0x04, P = 0x24;;ldy #$AA ;; Imm, Y = 0xAA, P = 0xA4cpy #$AA ;; Imm, Y = 0xAA, P = 0x27bne * ;; Rel, Y = 0xAA, P = 0x27bmi * ;; Rel, Y = 0xAA, P = 0x27bcc * ;; Rel, Y = 0xAA, P = 0x27phy;;ldx #$55 ;; Imm, X = 0x55, P = 0x25cpx #$55 ;; Imm, X = 0x55, P = 0x27bne * ;; Rel, X = 0x55, P = 0x27bmi * ;; Rel, X = 0x55, P = 0x27bcc * ;; Rel, X = 0x55, P = 0x27phx;;ply ;; Imm, Y = 0x55, P = 0x25cpy #$55 ;; Imm, Y = 0x55, P = 0x27bne * ;; Rel, Y = 0x55, P = 0x27bmi * ;; Rel, Y = 0x55, P = 0x27bcc * ;; Rel, Y = 0x55, P = 0x27;;plx ;; Imm, X = 0xAA, P = 0xA5cpx #$AA ;; Imm, X = 0xAA, P = 0x27bne * ;; Rel, X = 0xAA, P = 0x27bmi * ;; Rel, X = 0xAA, P = 0x27bcc * ;; Rel, X = 0xAA, P = 0x27;;bit #$04 ;; Imm, A = 0x04, P = 0x25beq * ;; Rel, A = 0x04, P = 0x25bit #$00 ;; Imm, A = 0x04, P = 0x27bne * ;; Rel, A = 0x04, P = 0x27;;tya ;; Imm, A = 0x55, P = 0x25cmp #$55 ;; Imm, A = 0x55, P = 0x27bne * ;; Rel, A = 0x55, P = 0x27bmi * ;; Rel, A = 0x55, P = 0x27bcc * ;; Rel, A = 0x55, P = 0x27;;tay ;; Imm, Y = 0x55, P = 0x25cpy #$55 ;; Imm, Y = 0x55, P = 0x27bne * ;; Rel, Y = 0x55, P = 0x27bmi * ;; Rel, Y = 0x55, P = 0x27bcc * ;; Rel, Y = 0x55, P = 0x27;;txa ;; Imm, A = 0xAA, P = 0xA5cmp #$AA ;; Imm, A = 0xAA, P = 0x27bne * ;; Rel, A = 0xAA, P = 0x27bmi * ;; Rel, A = 0xAA, P = 0x27bcc * ;; Rel, A = 0xAA, P = 0x27;;tax ;; Imm, X = 0xAA, P = 0xA5cpx #$AA ;; Imm, X = 0xAA, P = 0x27bne * ;; Rel, X = 0xAA, P = 0x27bmi * ;; Rel, X = 0xAA, P = 0x27bcc * ;; Rel, X = 0xAA, P = 0x27;;tsx ;; Imm, X = 0xFF, P = 0xA5txs ;; Imm, S = 0xFF, P = 0xA5cpx #$FF ;; Imm, X = 0xFF, P = 0x27bne * ;; Rel, X = 0xFF, P = 0x27bmi * ;; Rel, X = 0xFF, P = 0x27bcc * ;; Rel, X = 0xFF, P = 0x27;;asl a ;; Acc, A = 0x54, P = 0x25bmi * ;; Rel, A = 0x54, P = 0x25bcc * ;; Rel, A = 0x54, P = 0x25cmp #$54 ;; Imm, A = 0x54, P = 0x27bne * ;; Rel, A = 0x54, P = 0x27;;rol a ;; Acc, A = 0xA9, P = 0xA5bpl * ;; Rel, A = 0xA9, P = 0xA4bcs * ;; Rel, A = 0xA9, P = 0xA4cmp #$A9 ;; Imm, A = 0xA9, P = 0x26bne * ;; Rel, A = 0xA9, P = 0x26;;lsr a ;; Acc, A = 0x54, P = 0x25bmi * ;; Rel, A = 0x54, P = 0x25bcc * ;; Rel, A = 0x54, P = 0x25cmp #$54 ;; Imm, A = 0x54, P = 0x27bne * ;; Rel, A = 0x54, P = 0x27;;ror a ;; Acc, A = 0xAA, P = 0xA4bpl * ;; Rel, A = 0xA9, P = 0xA4bcs * ;; Rel, A = 0xA9, P = 0xA4cmp #$AA ;; Imm, A = 0xAA, P = 0x27bne * ;; Rel, A = 0xAA, P = 0x27;;inc a ;; Acc, A = 0xAB, P = 0xA5cmp #$AB ;; Imm, A = 0xAB, P = 0x27bne * ;; Rel, A = 0xAB, P = 0x27bmi * ;; Rel, A = 0xAB, P = 0x27bcc * ;; Rel, A = 0xAB, P = 0x27;;inx ;; Imp, X = 0x00, P = 0x27cpx #$00 ;; Imm, X = 0x00, P = 0x27bne * ;; Rel, X = 0x00, P = 0x27bmi * ;; Rel, X = 0x00, P = 0x27bcc * ;; Rel, X = 0x00, P = 0x27;;iny ;; Imp, Y = 0x56, P = 0x25cpy #$56 ;; Imm, Y = 0x56, P = 0x27bne * ;; Rel, Y = 0x56, P = 0x27bmi * ;; Rel, Y = 0x56, P = 0x27bcc * ;; Rel, Y = 0x56, P = 0x27;;dec a ;; Acc, A = 0xAA, P = 0xA5cmp #$AA ;; Imm, A = 0xAA, P = 0x27bne * ;; Rel, A = 0xAA, P = 0x27bmi * ;; Rel, A = 0xAA, P = 0x27bcc * ;; Rel, A = 0xAA, P = 0x27;;dex ;; Imp, X = 0xFF, P = 0xA5cpx #$FF ;; Imm, X = 0xFF, P = 0x27bne * ;; Rel, X = 0xFF, P = 0x27bmi * ;; Rel, X = 0xFF, P = 0x27bcc * ;; Rel, X = 0xFF, P = 0x27;;dey ;; Imp, Y = 0x55, P = 0x25cpy #$55 ;; Imm, Y = 0x55, P = 0x27bne * ;; Rel, Y = 0x55, P = 0x27bmi * ;; Rel, Y = 0x55, P = 0x27bcc * ;; Rel, Y = 0x55, P = 0x27;;lda #$00 ;; Imm, A = 0x00, P = 0x27tax ;; Imp, X = 0x00, P = 0x27tay ;; Imp, Y = 0x00, P = 0x27;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page Instructions;;dec a ;; Acc, A = 0xFF, P = 0xA5sta DP ;; WO_DP, DP = 0xFF, P = 0xA5rol a ;; Acc, A = 0xFF, P = 0xA5ora DP ;; RO_DP, A = 0xFF, P = 0xA5cmp #$FF ;; Imm, A = 0xFF, P = 0x27bne * ;; Rel, A = 0xFF, P = 0x27;;stz DP ;; WO_DP, DP = 0x00, P = 0x27dec a ;; Acc, A = 0xFE, P = 0xA5lda DP ;; RO_DP, A = 0x00, P = 0x27bne * ;; Rel, A = 0x00, P = 0x27cmp DP ;; RO_DP, A = 0x00, P = 0x27bne * ;; Rel, A = 0x00, P = 0x27;;stz DP ;; WO_DP, DP = 0x00, p = 0x27dey ;; Imp, Y = 0xFF, P = 0xA5sty DP ;; RO_DP, Y = 0xFF, P = 0xA5iny ;; Imp, Y = 0x00, P = 0x27ldy DP ;; RO_DP, Y = 0xFF, P = 0xA5cpy #$FF ;; Imm, Y = 0xFF, P = 0x27bne *cpy DP ;; RO_DP, Y = 0xFF, P = 0x27bne *;;stz DP ;; WO_DP, DP = 0x00, p = 0x27dex ;; Imp, X = 0xFF, P = 0xA5stx DP ;; RO_DP, DP = 0xFF, P = 0xA5inx ;; Imp, X = 0x00, P = 0x27ldx DP ;; RO_DP, X = 0xFF, P = 0xA5cpx #$FF ;; Imm, X = 0xFF, P = 0x27bne *cpx DP ;; RO_DP, X = 0xFF, P = 0x27bne *;;txa ;; Imp, A = 0xFF, P = 0xA5eor DP ;; RO_DP, A = 0x00, P = 0x27bne *;;lda #$55 ;; Imm, A = 0x55, P = 0x25sta DP ;; WO_DO, DP = 0x55, P = 0x25lda #$FF ;; Imm, A = 0xFF, P = 0xA5and DP ;; RO_DP, A = 0x55, P = 0x25cmp #$55 ;; Imm, A = 0x55, P = 0x27bne *;;adc DP ;; RO_DP, A = 0xAB, P = 0xE4cmp #$AB ;; Imm, A = 0xAB, P = 0x67bne *sbc DP ;; RO_DP, A = 0x55, P = 0x65cmp #$56 ;; Imm, A = 0x56, P = 0x67bne *lda #$82 ;; Imm, A = 0x82, P = 0xE5bit DP ;; RO_DP A = 0x82, P = 0x67bmi *bvc *;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page Indexed Instructions;;lda #$24 ;; Imm, A = 0x24, P = 0x65pha ;; Imp, A = 0x24, P = 0x65plp ;; Imp, A = 0x24, P = 0x24;;stz DP ;; DP, DP = 0x00, P = 0x24stz DP+1 ;; DP, DPX = 0x00, P = 0x24stz DP+2 ;; DP, DPY = 0x00, P = 0x24;;lda #$55 ;; Imm, A = 0x55, P = 0x24sta DPY ;; DP, DPY = 0x55, P = 0x24asl a ;; Acc, A = 0xAA, P = 0xA4ldx DPX ;; DP, X = 0x00, P = 0x26ldy DPY ;; DP, Y = 0x55, P = 0x26;;inx ;; Imp, X = 0x01, P = 0x24sta DP,x ;; WO_DPX, DPX = 0xAA, P = 0x24lsr a ;; Acc, A = 0x55, P = 0x24inx ;; Imp, X = 0x02, P = 0x24sta DP,x ;; WO_DPX, DPY = 0x55, P = 0x24dex ;; Imp, X = 0x01, P = 0x24ora DP,x ;; RO_DPX, A = 0xFF, P = 0xA4and DP,x ;; RO_DPX, A = 0xAA, P = 0xA4eor DP,x ;; RO_DPX, A = 0x00, P = 0x26bne * ;; Rel, A = 0x00, P = 0x26stz DP,x ;; WO_DPX, DPX = 0x00, P = 0x26cmp DP,x ;; RO_DPX, A = 0x00, P = 0x27bne * ;; Rel, A = 0x00, P = 0x27bcc * ;; Rel, A = 0x00, P = 0x27inx ;; Imp, X = 0x02, P = 0x25ldy DP,x ;; RO_DPX, Y = 0x55, P = 0x25tya ;; Imp, A = 0x55, P = 0x25asl a ;; Acc, A = 0xAA, P = 0xA4bit DP,x ;; RO_DPX, A = 0xAA, M = 0x55, P = 0x66bmi * ;; Rel, A = 0xAA, P = 0x66bvc * ;; Rel, A = 0xAA, P = 0x66bne * ;; Rel, A = 0xAA, P = 0x66clv ;; Imp, A = 0xAA, P = 0x26sec ;; Imp, A = 0xAA, P = 0x27adc DP,x ;; RO_DPX, A = 0x00, P = 0x27clcsbc DP,x ;; RO_DPX, A = 0xAA, P = 0xA4bpl * ;; Rel, A = 0xAA, P = 0xA4bvs * ;; Rel, A = 0xAA, P = 0xA4beq * ;; Rel, A = 0xAA, P = 0xA4bcs * ;; Rel, A = 0xAA, P = 0xA4;;lda DP-2,x ;; RO_DPX, A = 0x00, P = 0x26tay ;; Imp, Y = 0x00, P = 0x26sty DP,x ;; WO_DPX, DPY = 0x00, P = 0x26;;ldx DP,y ;; RO_DPY, X = 0x00, P = 0x26iny ;; Imp, Y = 0x01, P = 0x24stx DP,y ;; WO_DPY, DPX = 0x00, P = 0x24;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Absolute Address Instructions;;lda #$24 ;; Imm, A = 0x24, P = 0x67pha ;; Imp, A = 0x24, P = 0x67plp ;; Imp, A = 0x24, P = 0x24;;stz Abs ;; WO_Abs, Abs = 0x00, P = 0x24stz Abs+1 ;; WO_Abs, AbsX = 0x00, P = 0x24stz Abs+2 ;; WO_Abs, AbsY = 0x00, P = 0x24;;lda #$55 ;; Imm, A = 0x55, P = 0x24sta AbsY ;; WO_Abs, AbsY = 0x55, P = 0x24asl a ;; Acc, A = 0xAA, P = 0xA4ldx AbsX ;; RO_Abs, X = 0x00, P = 0x26ldy AbsY ;; RO_Abs, Y = 0x55, P = 0x26;;sta AbsX ;; WO_Abs, AbsX = 0xAA, P = 0x24lsr a ;; Acc, A = 0x55, P = 0x24sta AbsY ;; WO_Abs, AbsY = 0x55, P = 0x24;;ora AbsX ;; RO_Abs, A = 0xFF, P = 0xA4and AbsX ;; RO_Abs, A = 0xAA, P = 0xA4eor AbsX ;; RO_Abs, A = 0x00, P = 0x26bne * ;; Rel, A = 0x00, P = 0x26stz AbsX ;; WO_Abs, AbsX = 0x00, P = 0x26cmp AbsX ;; RO_Abs, A = 0x00, P = 0x27bne * ;; Rel, A = 0x00, P = 0x27bcc * ;; Rel, A = 0x00, P = 0x27ldy AbsY ;; RO_Abs, Y = 0x55, P = 0x25tya ;; Imp, A = 0x55, P = 0x25asl a ;; Acc, A = 0xAA, P = 0xA4bit AbsY ;; RO_Abs, A = 0xAA, M = 0x55, P = 0x66bmi * ;; Rel, A = 0xAA, P = 0x66bvc * ;; Rel, A = 0xAA, P = 0x66bne * ;; Rel, A = 0xAA, P = 0x66clv ;; Imp, A = 0xAA, P = 0x26sec ;; Imp, A = 0xAA, P = 0x27adc AbsY ;; RO_Abs, A = 0x00, P = 0x27clcsbc AbsY ;; RO_Abs, A = 0xAA, P = 0xA4bpl * ;; Rel, A = 0xAA, P = 0xA4bvs * ;; Rel, A = 0xAA, P = 0xA4beq * ;; Rel, A = 0xAA, P = 0xA4bcs * ;; Rel, A = 0xAA, P = 0xA4;;lda Abs ;; RO_Abs, A = 0x00, P = 0x26tay ;; Imp, Y = 0x00, P = 0x26sty AbsY ;; WO_Abs, AbsY = 0x00, P = 0x26cpy Abs ;; RO_Abs, Y = 0x00, Abs = 0x00, P = 0x26bne * ;; Rel, A = 0xAA, P = 0x66;;ldx Abs ;; RO_Abs, X = 0x00, P = 0x26stx AbsX ;; WO_Abs, AbsX = 0x00, P = 0x26cpx Abs ;; RO_Abs, X = 0x00, Abs = 0x00, P = 0x26bne * ;; Rel, A = 0xAA, P = 0x26;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Absolute Indexed Address Instructions;;lda #$24 ;; Imm, A = 0x24, P = 0x67pha ;; Imp, A = 0x24, P = 0x67plp ;; Imp, A = 0x24, P = 0x24;;stz Abs ;; Abs, Abs = 0x00, P = 0x24stz Abs+1 ;; Abs, AbsX = 0x00, P = 0x24stz Abs+2 ;; Abs, AbsY = 0x00, P = 0x24;;lda #$55 ;; Imm, A = 0x55, P = 0x24sta AbsY ;; Abs, AbsY = 0x55, P = 0x24asl a ;; Acc, A = 0xAA, P = 0xA4ldx AbsX ;; Abs, X = 0x00, P = 0x26ldy AbsY ;; Abs, Y = 0x55, P = 0x26;;inx ;; Imp, X = 0x01, P = 0x24sta Abs,x ;; WO_AbsX, AbsX = 0xAA, P = 0x24lsr a ;; Acc, A = 0x55, P = 0x24inx ;; Imp, X = 0x02, P = 0x24sta Abs,x ;; WO_AbsX, AbsX = 0x55, P = 0x24dex ;; Imp, X = 0x01, P = 0x24ora Abs,x ;; RO_AbsX, A = 0xFF, P = 0xA4and Abs,x ;; RO_AbsX, A = 0xAA, P = 0xA4eor Abs,x ;; RO_AbsX, A = 0x00, P = 0x26bne * ;; Rel, A = 0x00, P = 0x26stz Abs,x ;; WO_AbsX, AbsX = 0x00, P = 0x26cmp Abs,x ;; RO_AbsX, A = 0x00, P = 0x27bne * ;; Rel, A = 0x00, P = 0x27bcc * ;; Rel, A = 0x00, P = 0x27inx ;; Imp, X = 0x02, P = 0x25ldy Abs,x ;; RO_AbsX, Y = 0x55, P = 0x25tya ;; Imp, A = 0x55, P = 0x25asl a ;; Acc, A = 0xAA, P = 0xA4bit Abs,x ;; RO_AbsX, A = 0xAA, M = 0x55, P = 0x66bmi * ;; Rel, A = 0xAA, P = 0x66bvc * ;; Rel, A = 0xAA, P = 0x66bne * ;; Rel, A = 0xAA, P = 0x66clv ;; Imp, A = 0xAA, P = 0x26sec ;; Imp, A = 0xAA, P = 0x27adc Abs,x ;; RO_AbsX, A = 0x00, P = 0x27clcsbc Abs,x ;; RO_AbsX, A = 0xAA, P = 0xA4bpl * ;; Rel, A = 0xAA, P = 0xA4bvs * ;; Rel, A = 0xAA, P = 0xA4beq * ;; Rel, A = 0xAA, P = 0xA4bcs * ;; Rel, A = 0xAA, P = 0xA4;;lda Abs-2,x ;; RO_AbsX, A = 0x00, P = 0x26tay ;; Imp, Y = 0x00, P = 0x26sty AbsY ;; WO_Abs, AbsY = 0x00, P = 0x26;;ldx Abs,y ;; RO_AbsY, X = 0x00, P = 0x26stx AbsX ;; WO_Abs, AbsX = 0x00, P = 0x24;;ldy #$02 ;; Imm, Y = 0x02, P = 0x24lda #$AA ;; Imm, A = 0xAA, P = 0xA4;;sta Abs,y ;; WO_AbsY, AbsY = 0xAA, P = 0xA4eor Abs,y ;; RO_AbsY, A = 0x00, P = 0x26lda Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4lsr a ;; Acc, A = 0x55, P = 0x24ora Abs,y ;; RO_AbsY, A = 0xFF, P = 0xA4and Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4cmp Abs,y ;; RO_AbsY, A = 0xAA, P = 0x27;;sbc Abs,y ;; RO_AbsY, A = 0x00, P = 0x27clc ;; Imp, A = 0x00, P = 0x26adc Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page RMW Instructions;;lda #$24 ;; Imm, A = 0x24, P = 0xXXpha ;; Imp, A = 0x24, P = 0xXXplp ;; Imp, A = 0x24, P = 0x24;;lda #$AA ;; Imm, A = 0xAA, P = 0xA4sta DP ;; WO_DP, DP = 0xAA, P = 0xA4;;asl DP ;; RMW_DP, DP = 0x54, P = 0x25rol DP ;; RMW_DP, DP = 0xA9, P = 0xA4lsr DP ;; RMW_DP, DP = 0x54, P = 0x25ror DP ;; RMW_DP, DP = 0xAA, P = 0xA4;;dec DP ;; RMW_DP, DP = 0xA9, P = 0xA4inc DP ;; RMW_DP, DP = 0xAA, P = 0xA4;;lsr a ;; Acc, A = 0x55, P = 0x24;;tsb DP ;; RMW_DP, DP = 0xFF, P = 0x26trb DP ;; RMW_DP, DP = 0xAA, P = 0x24;;ldx #$01 ;; Imm, X = 0x01, P = 0x24asl a ;; Acc, A = 0xAA, P = 0x24sta DP,x ;; WO_DPX, DPX = 0xAA, P = 0x24;;asl DP,x ;; RMW_DPX, DPX = 0x54, P = 0x25rol DP,x ;; RMW_DPX, DPX = 0xA9, P = 0xA4lsr DP,x ;; RMW_DPX, DPX = 0x54, P = 0x25ror DP,x ;; RMW_DPX, DPX = 0xAA, P = 0xA4;;dec DP,x ;; RMW_DPX, DPX = 0xA9, P = 0xA4inc DP,x ;; RMW_DPX, DPX = 0xAA, P = 0xA4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Absolute Address RMW Instructions;;lda #$24 ;; Imm, A = 0x24, P = 0xXXpha ;; Imp, A = 0x24, P = 0xXXplp ;; Imp, A = 0x24, P = 0x24;;lda #$AA ;; Imm, A = 0xAA, P = 0xA4sta Abs ;; WO_Abs, Abs = 0xAA, P = 0xA4;;asl Abs ;; RMW_Abs, Abs = 0x54, P = 0x25rol Abs ;; RMW_Abs, Abs = 0xA9, P = 0xA4lsr Abs ;; RMW_Abs, Abs = 0x54, P = 0x25ror Abs ;; RMW_Abs, Abs = 0xAA, P = 0xA4;;dec Abs ;; RMW_Abs, Abs = 0xA9, P = 0xA5inc Abs ;; RMW_Abs, Abs = 0xAA, P = 0xA4;;lsr a ;; Acc, A = 0x55, P = 0x24;;tsb Abs ;; RMW_Abs, Abs = 0xFF, P = 0x26trb Abs ;; RMW_Abs, Abs = 0xAA, P = 0x24;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Absolute Address Indexed RMW Instructions;;ldx #$01 ;; Imm, X = 0x01, P = 0x24asl a ;; Acc, A = 0xAA, P = 0xA4sta Abs,x ;; WO_AbsX, AbsX = 0xAA, P = 0xA4;;asl Abs,x ;; RMW_AbsX, AbsX = 0x54, P = 0x25rol Abs,x ;; RMW_AbsX, AbsX = 0xA9, P = 0xA4lsr Abs,x ;; RMW_AbsX, AbsX = 0x54, P = 0x25ror Abs,x ;; RMW_AbsX, AbsX = 0xAA, P = 0xA4;;dec Abs,x ;; RMW_AbsX, AbsX = 0xA9, P = 0xA4inc Abs,x ;; RMW_AbsX, AbsX = 0xAA, P = 0xA4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page Indirect Instructions;;jsr Init_RAM ;; Initialize RAM used for pointers;;lda #$24 ;; Imm, A = 0x24, P = 0xXXpha ;; Imp, A = 0x24, P = 0xXXplp ;; Imp, A = 0x24, P = 0x24;;lda #$AA ;; Imm, A = 0xAA, P = 0xA4sta DP ;; WO_DP, DP = 0xAA, P = 0xA4lda #$00 ;; Imm, A = 0x00, P = 0x26;;ora (pDPI) ;; RO_DPI A = 0xAA, P = 0xA4lsr a ;; Acc, A = 0x55, P = 0x24eor (pDPI) ;; RO_DPI, A = 0xFF, P = 0xA4sec ;; Imp, A = 0xFF, P = 0xA5adc (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA5clc ;; Imp, A = 0xAA, P = 0xA4sbc (pDPI) ;; RO_DPI, A = 0xFF, P = 0xA4and (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA4cmp (pDPI) ;; RO_DPI, A = 0xAA, P = 0x27;;lda (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA5lsr a ;; Acc, A = 0x55, P = 0x24sta (pDPI) ;; WO_DPI DP = 0x55, P = 0x24cmp DP ;; RO_DP A = 0x55, P = 0x27;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page Pre-Indexed Indirect Instructions;;ldx #$02 ;; Imm, X = 0x02, P = 0x25ora (pDPI,x) ;; RO_DPXI, A = 0xFF, P = 0xA5and (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA5eor (pDPI,x) ;; RO_DPXI, A = 0x00, P = 0x27clc ;; Imp, A = 0x00, P = 0x26adc (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA4cmp (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0x27sbc (pDPI,x) ;; RO_DPXI, A = 0x00, P = 0x27lda (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA5ldx #$04 ;; Imm, X = 0x04, P = 0x25sta (pDPI,x) ;; WO_DPXI, DPY = 0xAA, P = 0x25;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Direct/Zero Page Post-Indexed Indirect Instructions;;ldy #$00 ;; Imm, Y = 0x00, P = 0x27;;ora (pDPI),y ;; RO_DPIY, A = 0xFF, P = 0xA5iny ;; Imp, Y = 0x01, P = 0x25and (pDPI),y ;; RO_DPIY, A = 0xAA, P = 0xA5dey ;; Imp, Y = 0x00, P = 0x27eor (pDPI),y ;; RO_DPIY, A = 0xFF, P = 0xA5adc (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x25cmp (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x27sbc (pDPI),y ;; RO_DPIY, A = 0x00, P = 0x27iny ;; Imp, Y = 0x01, P = 0x25sta (pDPI),y ;; WO_DPIY, DPX = 0x00, P = 0x25dey ;; Imp, Y = 0x00, P = 0x26lda (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x24;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; All Unused Op-codes - Expected to execute in single cycle as NOPs.;;db $02, $22, $42, $62, $82, $C2, $E2db $03, $13, $23, $33, $43, $53, $63, $73db $83, $93, $A3, $B3, $C3, $D3, $E3, $F3db $44, $54, $D4, $F4;; db $07, $17, $27, $37, $47, $57, $67, $77 ;; RMBx dp;; db $87, $97, $A7, $B7, $C7, $D7, $E7, $F7 ;; SMBx dpdb $0B, $1B, $2B, $3B, $4B, $5B, $6B, $7Bdb $8B, $9B, $AB, $BB, $EB, $FBdb $5C, $DC, $FC;; db $0F, $1F, $2F, $3F, $4F, $5F, $6F, $7F ;; BBRx dp,rel;; db $8F, $9F, $AF, $BF, $CF, $DF, $EF, $FF ;; BBSx dp,rel;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; BRK Instruction;;sed ;; Set Decimal Mode Flagcli ;; Clear Interrupt Mask;;brk ;; Single Cycle, Nxtdb $FF ;; Simple tag so ISR does not need to return PC;;sei;;BCD_Tst: clclda #$99adc #$01bcc *bne *sbc #$01beq *bcs *cmp #$99bne *clc;;stz IRQ_On;;IRQ_Tst: sedclinopseclda #$00bne IRQ_Tst3IRQ_Tst2: sbc #$01jsr Returnbra IRQ_Tst4IRQ_Tst3: jmp IRQ_Tst2IRQ_Tst4: seicld;;stz IRQ_Off;;;; Test zp,x and zp,y page zero wrapping;;lda #$00 ;; clear Accumulatorldx #$01 ;; Set X to test first page 0 index operationldy #$02 ;; Set Y to test second index operation;; tax ;; clear X;; tay ;; clear Y;; inx ;; increment X to test first index operation;; iny ;; increment Y twice to force it to point to;; iny ;; wrapped negative of the wrapped pointer.;;clc ;; clear carry before summationlda $FE,x ;; load low byte of theadc $FFFF,y ;; add low bytes of Return and -Return;;bne * ;; halt here if sum is not zero;;inx ;; point to wrapped high bytesinylda $FE,x ;; load high byte of Returnadc $FFFF,y ;; add high bytes of Return and -Return;;bne * ;; halt here if the sum is not zero;;dey ;; point back to lsbldx $ff,y ;; load lsb of -Return valuecpx #(lo -Return) ;; compare;;bne * ;; halt here if the values are not equal;;txa ;; complement value and store backeor #$ff ;; pointer will point to location Return-1tax ;; because of 1's complement mathstx $ff,y;;iny ;; point to msbldx $ff,y ;; load msb of -Return valuecpx #(hi -Return) ;; compare;;bne * ;; halt here if the values are not equal;;txa ;; complement value and store backeor #$ff ;; pointer will point to location Return-1tax ;; because of 1's complement mathstx $ff,y;;;; Test (dp), (dp,x), and (dp,y) address mode page 0 wrapping;;lda ($ff) ;; load value stored in Returnldy #$01 ;; ptr stored at $0001 points to Return-1cmp ($01),y ;; compare;;bne * ;; halt here if the *($ff) <> *(*($01)+1);;ldx #$02 ;; increment pointer at $0001clclda $FF,x ;; load lsb from $0001adc #$01 ;; incrementsta $FF,x ;; store lsbinx ;; point to msblda $FF,x ;; load lsb from $0002adc #$00 ;; increment msb if carry out of lsbsta $FF,x;;dex ;; point back to lsblda ($ff,x) ;; load opcode at Returndec $ff ;; change pointer to point to Return-1cmp ($ff),y ;; both pointers (after indexing) -> Return;;bne *;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Test Rockwell Instructions;;stz $80 ;; ZP location for Rockwell Instruction Test;;SMBx 0,$80BBRx 0,$80,$RMBx 0,$80BBSx 0,$80,$;;SMBx 1,$80BBRx 1,$80,$RMBx 1,$80BBSx 1,$80,$;;SMBx 2,$80BBRx 2,$80,$RMBx 2,$80BBSx 2,$80,$;;SMBx 3,$80BBRx 3,$80,$RMBx 3,$80BBSx 3,$80,$;;SMBx 4,$80BBRx 4,$80,$RMBx 4,$80BBSx 4,$80,$;;SMBx 5,$80BBRx 5,$80,$RMBx 5,$80BBSx 5,$80,$;;SMBx 6,$80BBRx 6,$80,$RMBx 6,$80BBSx 6,$80,$;;SMBx 7,$80BBRx 7,$80,$RMBx 7,$80BBSx 7,$80,$;;lda #$ffsta $80;;BBSx 7,$80,MSB_SetClr_MSB:RMBx 7,$80BBRx 7,$80,MSB_ClrMSB_Set bra Clr_MSBMSB_Clr:WAInop 4stz IRQ_Onnop 4cliWAIseistz IRQ_Off;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Prepare Registers for looping to start of the test program;;lda #$00 ;; Imm, A = 0x00, P = 0x26tax ;; Imp, X = 0x00, P = 0x26tay ;; Imp, Y = 0x00, P = 0x26;;jmp Start ;; Imp, A = X = Y = 0x00, P = 0x26;;Last_Addrs:;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Vector Table;;Vect_Table org $FFFA;;dw Start ;; NMI Interrupt Vectordw Start ;; Reset Vectordw Interrupt ;; IRQ/BRK Interrupt Vector;;end Start